Subzero. ARM32 RegTable. Adds missing headers.

pydir/gen_arm32_reg_tables.py

Index: pydir/gen_arm32_reg_tables.py
diff --git a/pydir/gen_arm32_reg_tables.py b/pydir/gen_arm32_reg_tables.py
index d2058ab84f1d47d4599b38c4a1385eb2561e6e4b..22846499bc08651263b5673a01d98b45423ea2c3 100644
--- a/pydir/gen_arm32_reg_tables.py
+++ b/pydir/gen_arm32_reg_tables.py
@@ -53,8 +53,9 @@ class RegFeatures(object):
     return any(self.FeaturesDict[FpFeature] for FpFeature in (
                    'IsFP32', 'IsFP64', 'IsVec128'))
 
-  def DefiningXMacro(self):
-    return 'define X({parameters})'.format(parameters=', '.join(self.Features))
+  def DefiningXMacro(self, OtherFeatures):
+    return 'define X({parameters})'.format(
+        parameters=', '.join(OtherFeatures + self.Features))
 
 class Reg(object):
   def __init__(self, Name, Encode, AsmStr=None, **Features):
@@ -72,7 +73,7 @@ class Reg(object):
     return Other.Name in self.Features.Aliases().Aliases
 
   def DefiningXMacro(self):
-    return self.Features.DefiningXMacro()
+    return self.Features.DefiningXMacro(['Tag', 'Encoding'])
 
 # Note: The following tables break the usual 80-col on purpose -- it is easier
 # to read the register tables if each register entry is contained on a single