Index: src/IceInstX8664.cpp |
diff --git a/src/IceInstX8664.cpp b/src/IceInstX8664.cpp |
index 0072c6b50385cb35ff52476013ef13686d7064ff..a7236a3f67cd6f9de5992f8692927db97e7b81e3 100644 |
--- a/src/IceInstX8664.cpp |
+++ b/src/IceInstX8664.cpp |
@@ -270,7 +270,9 @@ TargetX8664Traits::Address TargetX8664Traits::X86OperandMem::toAsmAddress( |
const bool NeedSandboxing = Target->needSandboxing(); |
(void)NeedSandboxing; |
assert(!NeedSandboxing || IsLeaAddr || |
- (getBase()->getRegNum() == Traits::RegisterSet::Reg_r15)); |
+ (getBase()->getRegNum() == Traits::RegisterSet::Reg_r15) || |
+ (getBase()->getRegNum() == Traits::RegisterSet::Reg_rsp) || |
+ (getBase()->getRegNum() == Traits::RegisterSet::Reg_rbp)); |
return X8664::Traits::Address(getEncodedGPR(getBase()->getRegNum()), |
getEncodedGPR(getIndex()->getRegNum()), |
X8664::Traits::ScaleFactor(getShift()), Disp, |