Subzero. X86. Refactors Address Mode formation.

src/IceTargetLoweringX86Base.h

 //===- subzero/src/IceTargetLoweringX86Base.h - x86 lowering ----*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 176 matching lines @@
   InstructionSetEnum getInstructionSet() const { return InstructionSet; }
   Operand *legalizeUndef(Operand *From, int32_t RegNum = Variable::NoRegister);
 
 protected:
   const bool NeedSandboxing;
 
   explicit TargetX86Base(Cfg *Func);
 
   void postLower() override;
 
+  /// Initializes the RebasePtr member variable -- if so required by
+  /// SandboxingType for the concrete Target.
+  void initRebasePtr() {
+    assert(SandboxingType != ST_None);
+    dispatchToConcrete(&Traits::ConcreteTarget::initRebasePtr);
+  }
+
+  /// Emit code that initializes the value of the RebasePtr near the start of
+  /// the function -- if so required by SandboxingType for the concrete type.
   void initSandbox() {
+    assert(SandboxingType != ST_None);
     dispatchToConcrete(&Traits::ConcreteTarget::initSandbox);
   }
 
   void lowerAlloca(const InstAlloca *Inst) override;
   void lowerArguments() override;
   void lowerArithmetic(const InstArithmetic *Inst) override;
   void lowerAssign(const InstAssign *Inst) override;
   void lowerBr(const InstBr *Inst) override;
   void lowerCall(const InstCall *Inst) override;
   void lowerCast(const InstCast *Inst) override;
@@ skipping 10 matching lines @@
   void lowerStore(const InstStore *Inst) override;
   void lowerSwitch(const InstSwitch *Inst) override;
   void lowerUnreachable(const InstUnreachable *Inst) override;
   void lowerOther(const Inst *Instr) override;
   void lowerRMW(const InstX86FakeRMW *RMW);
   void prelowerPhis() override;
   uint32_t getCallStackArgumentsSizeBytes(const std::vector<Type> &ArgTypes,
                                           Type ReturnType);
   uint32_t getCallStackArgumentsSizeBytes(const InstCall *Instr) override;
   void genTargetHelperCallFor(Inst *Instr) override;
+
+  /// OptAddr wraps all the possible operands that an x86 address might have.
+  struct OptAddr {
+    Variable *Base = nullptr;
+    Variable *Index = nullptr;
+    uint16_t Shift = 0;
+    int32_t Offset = 0;
+    ConstantRelocatable *Relocatable = nullptr;
+  };
+  /// Legalizes Addr w.r.t. SandboxingType. The exact type of legalization
+  /// varies for different <Target, SandboxingType> tuples.
+  bool legalizeOptAddrForSandbox(OptAddr *Addr) {
+    return dispatchToConcrete(
+        &Traits::ConcreteTarget::legalizeOptAddrForSandbox, std::move(Addr));
+  }
+  // Builds information for a canonical address expresion:
+  //   <Relocatable + Offset>(Base, Index, Shift)
+  X86OperandMem *computeAddressOpt(const Inst *Instr, Type MemType,
+                                   Operand *Addr);
   void doAddressOptLoad() override;
   void doAddressOptStore() override;
   void doMockBoundsCheck(Operand *Opnd) override;
   void randomlyInsertNop(float Probability,
                          RandomNumberGenerator &RNG) override;
 
   /// Naive lowering of cmpxchg.
   void lowerAtomicCmpxchg(Variable *DestPrev, Operand *Ptr, Operand *Expected,
                           Operand *Desired);
   /// Attempt a more optimized lowering of cmpxchg. Returns true if optimized.
@@ skipping 73 matching lines @@
   /// that the Operand kind is one of those indicated by the LegalMask (a
   /// bitmask of allowed kinds). If the input Operand is known to already meet
   /// the constraints, it may be simply returned as the result, without creating
   /// any new instructions or operands.
   enum OperandLegalization {
     Legal_None = 0,
     Legal_Reg = 1 << 0, // physical register, not stack location
     Legal_Imm = 1 << 1,
     Legal_Mem = 1 << 2, // includes [eax+4*ecx] as well as [esp+12]
     Legal_Rematerializable = 1 << 3,
-    Legal_AddrAbs = 1 << 4, // ConstantRelocatable doesn't have to add GotVar
+    Legal_AddrAbs = 1 << 4, // ConstantRelocatable doesn't have to add RebasePtr
     Legal_Default = ~(Legal_Rematerializable | Legal_AddrAbs)
     // TODO(stichnot): Figure out whether this default works for x86-64.
   };
   using LegalMask = uint32_t;
   Operand *legalize(Operand *From, LegalMask Allowed = Legal_Default,
                     int32_t RegNum = Variable::NoRegister);
   Variable *legalizeToReg(Operand *From, int32_t RegNum = Variable::NoRegister);
   /// Legalize the first source operand for use in the cmp instruction.
   Operand *legalizeSrc0ForCmp(Operand *Src0, Operand *Src1);
   /// Turn a pointer operand into a memory operand that can be used by a real
@@ skipping 67 matching lines @@
     }
 
     X86OperandMem **findMemoryReference() { return nullptr; }
 
   public:
     std::unique_ptr<AutoBundle> Bundler;
     X86OperandMem **const MemOperand;
 
     template <typename... T>
     AutoMemorySandboxer(typename Traits::TargetLowering *Target, T... Args)
-        : Target(Target),
-          MemOperand(
-              (!Traits::Is64Bit || !Target->Ctx->getFlags().getUseSandboxing())
-                  ? nullptr
-                  : findMemoryReference(Args...)) {
+        : Target(Target), MemOperand(Target->SandboxingType == ST_None
+                                         ? nullptr
+                                         : findMemoryReference(Args...)) {
       if (MemOperand != nullptr) {
         Bundler = makeUnique<AutoBundle>(Target, BundleLockOpt);
         *MemOperand = Target->_sandbox_mem_reference(*MemOperand);
       }
     }
 
     ~AutoMemorySandboxer() {}
   };
 
   /// The following are helpers that insert lowered x86 instructions with
@@ skipping 497 matching lines @@
   size_t SpillAreaSizeBytes = 0;
   size_t FixedAllocaSizeBytes = 0;
   size_t FixedAllocaAlignBytes = 0;
   bool PrologEmitsFixedAllocas = false;
   uint32_t MaxOutArgsSizeBytes = 0;
   static std::array<llvm::SmallBitVector, RCX86_NUM> TypeToRegisterSet;
   static std::array<llvm::SmallBitVector, Traits::RegisterSet::Reg_NUM>
       RegisterAliases;
   llvm::SmallBitVector RegsUsed;
   std::array<VarList, IceType_NUM> PhysicalRegisters;
-  // GotVar is a Variable that holds the GlobalOffsetTable address for Non-SFI
-  // mode.
-  Variable *GotVar = nullptr;
+  // RebasePtr is a Variable that holds the Rebasing pointer (if any) for the
+  // current sandboxing type.
+  Variable *RebasePtr = nullptr;
 
   /// Randomize a given immediate operand
   Operand *randomizeOrPoolImmediate(Constant *Immediate,
                                     int32_t RegNum = Variable::NoRegister);
   X86OperandMem *
   randomizeOrPoolImmediate(X86OperandMem *MemOperand,
                            int32_t RegNum = Variable::NoRegister);
   bool RandomizationPoolingPaused = false;
 
 private:
@@ skipping 47 matching lines @@
   void lowerSelectMove(Variable *Dest, BrCond Cond, Operand *SrcT,
                        Operand *SrcF);
   void lowerSelectIntMove(Variable *Dest, BrCond Cond, Operand *SrcT,
                           Operand *SrcF);
   /// Generic helper to move an arbitrary type from Src to Dest.
   void lowerMove(Variable *Dest, Operand *Src, bool IsRedefinition);
 
   /// Optimizations for idiom recognition.
   bool lowerOptimizeFcmpSelect(const InstFcmp *Fcmp, const InstSelect *Select);
 
-  /// Emit code that initializes the value of the GotVar near the start of the
-  /// function.  (This code is emitted only in Non-SFI mode.)
-  void initGotVarIfNeeded();
-
   /// Complains loudly if invoked because the cpu can handle 64-bit types
   /// natively.
   template <typename T = Traits>
   typename std::enable_if<T::Is64Bit, void>::type lowerIcmp64(const InstIcmp *,
                                                               const Inst *) {
     llvm::report_fatal_error(
         "Hey, yo! This is x86-64. Watcha doin'? (lowerIcmp64)");
   }
   /// x86lowerIcmp64 handles 64-bit icmp lowering.
   template <typename T = Traits>
   typename std::enable_if<!T::Is64Bit, void>::type
   lowerIcmp64(const InstIcmp *Icmp, const Inst *Consumer);
 
   BoolFolding<Traits> FoldingInfo;
 
   static FixupKind PcRelFixup;
   static FixupKind AbsFixup;
 };
 } // end of namespace X86NAMESPACE
 } // end of namespace Ice
 
 #include "IceTargetLoweringX86BaseImpl.h"
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H