PNaCl: Disable parts of InstCombine that introduce *.with.overflow intrinsics

test/Transforms/InstCombine/overflow.ll

 ; RUN: opt -S -instcombine < %s | FileCheck %s
 ; <rdar://problem/8558713>
 
+; @LOCALMOD-BEGIN
+; PNaCl does not support the with.overflow intrinsics in its stable
+; ABI, so these optimizations are disabled.
+
+; RUN: opt -S -instcombine < %s | FileCheck %s -check-prefix=PNACL
+; PNACL-NOT: with.overflow
+
 declare void @throwAnExceptionOrWhatever()
 
 ; CHECK: @test1
 define i32 @test1(i32 %a, i32 %b) nounwind ssp {
 entry:
-; CHECK-NOT: sext
+; C;HECK-NOT: sext
   %conv = sext i32 %a to i64
   %conv2 = sext i32 %b to i64
   %add = add nsw i64 %conv2, %conv
   %add.off = add i64 %add, 2147483648
-; CHECK: llvm.sadd.with.overflow.i32
+; C;HECK: llvm.sadd.with.overflow.i32
   %0 = icmp ugt i64 %add.off, 4294967295
   br i1 %0, label %if.then, label %if.end
 
 if.then:
   tail call void @throwAnExceptionOrWhatever() nounwind
   br label %if.end
 
 if.end:
-; CHECK-NOT: trunc
+; C;HECK-NOT: trunc
   %conv9 = trunc i64 %add to i32
-; CHECK: ret i32
+; C;HECK: ret i32
   ret i32 %conv9
 }
 
 ; CHECK: @test2
 ; This form should not be promoted for two reasons: 1) it is unprofitable to
 ; promote it since the add.off instruction has another use, and 2) it is unsafe
 ; because the add-with-off makes the high bits of the original add live.
 define i32 @test2(i32 %a, i32 %b, i64* %P) nounwind ssp {
 entry:
   %conv = sext i32 %a to i64
@@ skipping 43 matching lines @@
 ; CHECK: @test4
 ; Should be able to form an i8 sadd computed in an i32.
 define zeroext i8 @test4(i8 signext %a, i8 signext %b) nounwind ssp {
 entry:
   %conv = sext i8 %a to i32
   %conv2 = sext i8 %b to i32
   %add = add nsw i32 %conv2, %conv
   %add4 = add nsw i32 %add, 128
   %cmp = icmp ugt i32 %add4, 255
   br i1 %cmp, label %if.then, label %if.end
-; CHECK: llvm.sadd.with.overflow.i8
+; C;HECK: llvm.sadd.with.overflow.i8
 if.then:                                          ; preds = %entry
   tail call void @throwAnExceptionOrWhatever() nounwind
   unreachable
 
 if.end:                                           ; preds = %entry
   %conv7 = trunc i32 %add to i8
   ret i8 %conv7
 ; CHECK: ret i8
 }
 
 ; CHECK: @test5
-; CHECK: llvm.uadd.with.overflow
+; C;HECK: llvm.uadd.with.overflow
 ; CHECK: ret i64
 define i64 @test5(i64 %a, i64 %b) nounwind ssp {
 entry:
   %add = add i64 %b, %a
   %cmp = icmp ult i64 %add, %a
   %Q = select i1 %cmp, i64 %b, i64 42
   ret i64 %Q
 }
 
 ; CHECK: @test6
-; CHECK: llvm.uadd.with.overflow
+; C;HECK: llvm.uadd.with.overflow
 ; CHECK: ret i64
 define i64 @test6(i64 %a, i64 %b) nounwind ssp {
 entry:
   %add = add i64 %b, %a
   %cmp = icmp ult i64 %add, %b
   %Q = select i1 %cmp, i64 %b, i64 42
   ret i64 %Q
 }
 
 ; CHECK: @test7
-; CHECK: llvm.uadd.with.overflow
+; C;HECK: llvm.uadd.with.overflow
 ; CHECK: ret i64
 define i64 @test7(i64 %a, i64 %b) nounwind ssp {
 entry:
   %add = add i64 %b, %a
   %cmp = icmp ugt i64 %b, %add
   %Q = select i1 %cmp, i64 %b, i64 42
   ret i64 %Q
 }
 
 ; CHECK: @test8
@@ skipping 12 matching lines @@
   br i1 %0, label %if.then, label %if.end
 
 if.then:
   tail call void @throwAnExceptionOrWhatever() nounwind
   br label %if.end
 
 if.end:
   %conv9 = trunc i64 %add to i32
   ret i32 %conv9
 }
+
+; @LOCALMOD-END