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Unified Diff: src/base/atomicops_internals_s390_gcc.h

Issue 1601223003: S390: Add platform specific atomic ops impl (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Update header #define macro for consistency Created 4 years, 11 months ago
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Index: src/base/atomicops_internals_s390_gcc.h
diff --git a/src/base/atomicops_internals_ppc_gcc.h b/src/base/atomicops_internals_s390_gcc.h
similarity index 82%
copy from src/base/atomicops_internals_ppc_gcc.h
copy to src/base/atomicops_internals_s390_gcc.h
index 0d16500d1ba7dfc9387c32bf7d8b7b32c7b55f1f..6e34f305e3954470e85db80115ff0c97dd024138 100644
--- a/src/base/atomicops_internals_ppc_gcc.h
+++ b/src/base/atomicops_internals_s390_gcc.h
@@ -1,12 +1,11 @@
-// Copyright 2012 the V8 project authors. All rights reserved.
+// Copyright 2016 the V8 project authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
// This file is an internal atomic implementation, use atomicops.h instead.
-//
-#ifndef V8_BASE_ATOMICOPS_INTERNALS_PPC_H_
-#define V8_BASE_ATOMICOPS_INTERNALS_PPC_H_
+#ifndef V8_BASE_ATOMICOPS_INTERNALS_S390_H_
+#define V8_BASE_ATOMICOPS_INTERNALS_S390_H_
namespace v8 {
namespace base {
@@ -33,15 +32,7 @@ inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr,
inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
Atomic32 increment) {
- for (;;) {
- Atomic32 old_value = *ptr;
- Atomic32 new_value = old_value + increment;
- if (__sync_bool_compare_and_swap(ptr, old_value, new_value)) {
- return new_value;
- // The exchange took place as expected.
- }
- // Otherwise, *ptr changed mid-loop and we need to retry.
- }
+ return __sync_add_and_fetch(ptr, increment);
}
inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr,
@@ -62,8 +53,7 @@ inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) {
*ptr = value;
}
-inline void MemoryBarrier() {
- __asm__ __volatile__("sync" : : : "memory"); }
+inline void MemoryBarrier() { __sync_synchronize(); }
inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) {
*ptr = value;
@@ -90,7 +80,7 @@ inline Atomic32 Release_Load(volatile const Atomic32* ptr) {
return *ptr;
}
-#ifdef V8_TARGET_ARCH_PPC64
+#ifdef V8_TARGET_ARCH_S390X
inline Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr,
Atomic64 old_value,
Atomic64 new_value) {
@@ -113,17 +103,10 @@ inline Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr,
inline Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr,
Atomic64 increment) {
- for (;;) {
- Atomic64 old_value = *ptr;
- Atomic64 new_value = old_value + increment;
- if (__sync_bool_compare_and_swap(ptr, old_value, new_value)) {
- return new_value;
- // The exchange took place as expected.
- }
- // Otherwise, *ptr changed mid-loop and we need to retry.
- }
+ return __sync_add_and_fetch(ptr, increment);
}
+
inline Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr,
Atomic64 old_value, Atomic64 new_value) {
return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
@@ -162,7 +145,8 @@ inline Atomic64 Release_Load(volatile const Atomic64* ptr) {
}
#endif
+
} // namespace base
} // namespace v8
-#endif // V8_BASE_ATOMICOPS_INTERNALS_PPC_GCC_H_
+#endif // V8_BASE_ATOMICOPS_INTERNALS_S390_H_
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