Chromium Code Reviews| OLD | NEW |
|---|---|
| (Empty) | |
| 1 ; Show that we know how to translate (floating point) vldr and vstr. | |
| 2 | |
| 3 ; REQUIRES: allow_dump | |
| 4 | |
| 5 ; Compile using standalone assembler. | |
| 6 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -O2 \ | |
| 7 ; RUN: -reg-use r5,s20,d20 \ | |
| 8 ; RUN: | FileCheck %s --check-prefix=ASM | |
| 9 | |
| 10 ; Show bytes in assembled standalone code. | |
| 11 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ | |
| 12 ; RUN: --args -O2 \ | |
| 13 ; RUN: -reg-use r5,s20,d20 \ | |
| 14 ; RUN: | FileCheck %s --check-prefix=DIS | |
| 15 | |
| 16 ; Compile using integrated assembler. | |
| 17 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -O2 \ | |
| 18 ; RUN: -reg-use r5,s20,d20 \ | |
| 19 ; RUN: | FileCheck %s --check-prefix=IASM | |
| 20 | |
| 21 ; Show bytes in assembled integrated code. | |
| 22 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ | |
| 23 ; RUN: --args -O2 \ | |
| 24 ; RUN: -reg-use r5,s20,d20 \ | |
| 25 ; RUN: | FileCheck %s --check-prefix=DIS | |
| 26 | |
| 27 @floatVal = internal global [4 x i8] zeroinitializer, align 4 | |
| 28 | |
| 29 @doubleVal = internal global [8 x i8] zeroinitializer, align 8 | |
| 30 | |
| 31 define internal float @testFloat() { | |
| 32 ; ASM-LABEL: testFloat: | |
| 33 ; DIS-LABEL: 00000000 <testFloat>: | |
| 34 | |
| 35 entry: | |
| 36 ; ASM: .LtestFloat$entry: | |
| 37 | |
| 38 %vaddr = bitcast [4 x i8]* @floatVal to float* | |
|
Jim Stichnoth
2016/01/19 23:48:25
If you want to start with even simpler bitcode, yo
Karl
2016/01/21 17:47:36
Done.
| |
| 39 %v = load float, float* %vaddr, align 1 | |
| 40 | |
| 41 ; ASM: vldr s20, [r5] | |
| 42 ; DIS: 10: ed95aa00 | |
| 43 ; IASM-NOT: vldr | |
| 44 | |
| 45 ret float %v | |
| 46 } | |
| 47 | |
| 48 define internal double @testDouble() { | |
| 49 ; ASM-LABEL: testDouble: | |
| 50 ; DIS-LABEL: 00000030 <testDouble>: | |
| 51 | |
| 52 entry: | |
| 53 ; ASM: .LtestDouble$entry: | |
| 54 | |
| 55 %vaddr = bitcast [8 x i8]* @doubleVal to double* | |
| 56 %v = load double, double* %vaddr, align 1 | |
| 57 | |
| 58 ; ASM: vldr d20, [r5] | |
| 59 ; DIS: 3c: edd54b00 | |
| 60 ; IASM-NOT: vldr | |
| 61 | |
| 62 ret double %v | |
| 63 } | |
| OLD | NEW |