Subzero: Remove unneeded ScratchRegs.

src/IceTargetLoweringX8664Traits.h

 //===- subzero/src/IceTargetLoweringX8664Traits.h - x86-64 traits -*- C++ -*-=//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 474 matching lines @@
       static constexpr std::size_t value = 1;
     };
 
     const std::size_t Size;
   };
 
 public:
   static void initRegisterSet(
       const ::Ice::ClFlags &Flags,
       std::array<llvm::SmallBitVector, RCX86_NUM> *TypeToRegisterSet,
-      std::array<llvm::SmallBitVector, RegisterSet::Reg_NUM> *RegisterAliases,
-      llvm::SmallBitVector *ScratchRegs) {
+      std::array<llvm::SmallBitVector, RegisterSet::Reg_NUM> *RegisterAliases) {
     llvm::SmallBitVector IntegerRegistersI64(RegisterSet::Reg_NUM);
     llvm::SmallBitVector IntegerRegistersI32(RegisterSet::Reg_NUM);
     llvm::SmallBitVector IntegerRegistersI16(RegisterSet::Reg_NUM);
     llvm::SmallBitVector IntegerRegistersI8(RegisterSet::Reg_NUM);
     llvm::SmallBitVector FloatRegisters(RegisterSet::Reg_NUM);
     llvm::SmallBitVector VectorRegisters(RegisterSet::Reg_NUM);
     llvm::SmallBitVector Trunc64To8Registers(RegisterSet::Reg_NUM);
     llvm::SmallBitVector Trunc32To8Registers(RegisterSet::Reg_NUM);
     llvm::SmallBitVector Trunc16To8Registers(RegisterSet::Reg_NUM);
     llvm::SmallBitVector Trunc8RcvrRegisters(RegisterSet::Reg_NUM);
     llvm::SmallBitVector AhRcvrRegisters(RegisterSet::Reg_NUM);
     llvm::SmallBitVector InvalidRegisters(RegisterSet::Reg_NUM);
-    ScratchRegs->resize(RegisterSet::Reg_NUM);
 
     static constexpr struct {
       uint16_t Val;
       unsigned IsReservedWhenSandboxing : 1;
       unsigned Is64 : 1;
       unsigned Is32 : 1;
       unsigned Is16 : 1;
       unsigned Is8 : 1;
       unsigned IsXmm : 1;
       unsigned Is64To8 : 1;
       unsigned Is32To8 : 1;
       unsigned Is16To8 : 1;
       unsigned IsTrunc8Rcvr : 1;
       unsigned IsAhRcvr : 1;
-      unsigned Scratch : 1;
 #define NUM_ALIASES_BITS 2
       SizeT NumAliases : (NUM_ALIASES_BITS + 1);
       uint16_t Aliases[1 << NUM_ALIASES_BITS];
 #undef NUM_ALIASES_BITS
     } X8664RegTable[RegisterSet::Reg_NUM] = {
 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr,     \
           sboxres, isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8,      \
           is16To8, isTrunc8Rcvr, isAhRcvr, aliases)                            \
   {                                                                            \
     RegisterSet::val, sboxres, is64, is32, is16, is8, isXmm, is64To8, is32To8, \
-        is16To8, isTrunc8Rcvr, isAhRcvr, scratch, (SizeOf aliases).size(),     \
-        aliases,                                                               \
+        is16To8, isTrunc8Rcvr, isAhRcvr, (SizeOf aliases).size(), aliases,     \
   }                                                                            \
   ,
         REGX8664_TABLE
 #undef X
     };
 
     const bool NeedSandboxing = Flags.getUseSandboxing();
     for (SizeT ii = 0; ii < llvm::array_lengthof(X8664RegTable); ++ii) {
       const auto &Entry = X8664RegTable[ii];
       // Even though the register is disabled for register allocation, it might
@@ skipping 16 matching lines @@
       (IntegerRegistersI32)[Entry.Val] = Entry.Is32;
       (IntegerRegistersI16)[Entry.Val] = Entry.Is16;
       (IntegerRegistersI8)[Entry.Val] = Entry.Is8;
       (FloatRegisters)[Entry.Val] = Entry.IsXmm;
       (VectorRegisters)[Entry.Val] = Entry.IsXmm;
       (Trunc64To8Registers)[Entry.Val] = Entry.Is64To8;
       (Trunc32To8Registers)[Entry.Val] = Entry.Is32To8;
       (Trunc16To8Registers)[Entry.Val] = Entry.Is16To8;
       (Trunc8RcvrRegisters)[Entry.Val] = Entry.IsTrunc8Rcvr;
       (AhRcvrRegisters)[Entry.Val] = Entry.IsAhRcvr;
-      (*ScratchRegs)[Entry.Val] = Entry.Scratch;
     }
 
     (*TypeToRegisterSet)[RC_void] = InvalidRegisters;
     (*TypeToRegisterSet)[RC_i1] = IntegerRegistersI8;
     (*TypeToRegisterSet)[RC_i8] = IntegerRegistersI8;
     (*TypeToRegisterSet)[RC_i16] = IntegerRegistersI16;
     (*TypeToRegisterSet)[RC_i32] = IntegerRegistersI32;
     (*TypeToRegisterSet)[RC_i64] = IntegerRegistersI64;
     (*TypeToRegisterSet)[RC_f32] = FloatRegisters;
     (*TypeToRegisterSet)[RC_f64] = FloatRegisters;
@@ skipping 426 matching lines @@
     const char *FldString;   // s, l, or <blank>
   } TypeAttributes[];
 };
 
 using Traits = ::Ice::X8664::TargetX8664Traits;
 } // end of namespace X8664
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8664TRAITS_H