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| 1 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===// | 1 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 65 TargetMIPS32::TargetMIPS32(Cfg *Func) : TargetLowering(Func) {} | 65 TargetMIPS32::TargetMIPS32(Cfg *Func) : TargetLowering(Func) {} |
| 66 | 66 |
| 67 void TargetMIPS32::staticInit(GlobalContext *Ctx) { | 67 void TargetMIPS32::staticInit(GlobalContext *Ctx) { |
| 68 (void)Ctx; | 68 (void)Ctx; |
| 69 llvm::SmallBitVector IntegerRegisters(RegMIPS32::Reg_NUM); | 69 llvm::SmallBitVector IntegerRegisters(RegMIPS32::Reg_NUM); |
| 70 llvm::SmallBitVector I64PairRegisters(RegMIPS32::Reg_NUM); | 70 llvm::SmallBitVector I64PairRegisters(RegMIPS32::Reg_NUM); |
| 71 llvm::SmallBitVector Float32Registers(RegMIPS32::Reg_NUM); | 71 llvm::SmallBitVector Float32Registers(RegMIPS32::Reg_NUM); |
| 72 llvm::SmallBitVector Float64Registers(RegMIPS32::Reg_NUM); | 72 llvm::SmallBitVector Float64Registers(RegMIPS32::Reg_NUM); |
| 73 llvm::SmallBitVector VectorRegisters(RegMIPS32::Reg_NUM); | 73 llvm::SmallBitVector VectorRegisters(RegMIPS32::Reg_NUM); |
| 74 llvm::SmallBitVector InvalidRegisters(RegMIPS32::Reg_NUM); | 74 llvm::SmallBitVector InvalidRegisters(RegMIPS32::Reg_NUM); |
| 75 ScratchRegs.resize(RegMIPS32::Reg_NUM); | |
| 76 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt, \ | 75 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt, \ |
| 77 isI64Pair, isFP32, isFP64, isVec128, alias_init) \ | 76 isI64Pair, isFP32, isFP64, isVec128, alias_init) \ |
| 78 IntegerRegisters[RegMIPS32::val] = isInt; \ | 77 IntegerRegisters[RegMIPS32::val] = isInt; \ |
| 79 I64PairRegisters[RegMIPS32::val] = isI64Pair; \ | 78 I64PairRegisters[RegMIPS32::val] = isI64Pair; \ |
| 80 Float32Registers[RegMIPS32::val] = isFP32; \ | 79 Float32Registers[RegMIPS32::val] = isFP32; \ |
| 81 Float64Registers[RegMIPS32::val] = isFP64; \ | 80 Float64Registers[RegMIPS32::val] = isFP64; \ |
| 82 VectorRegisters[RegMIPS32::val] = isVec128; \ | 81 VectorRegisters[RegMIPS32::val] = isVec128; \ |
| 83 RegisterAliases[RegMIPS32::val].resize(RegMIPS32::Reg_NUM); \ | 82 RegisterAliases[RegMIPS32::val].resize(RegMIPS32::Reg_NUM); \ |
| 84 for (SizeT RegAlias : alias_init) { \ | 83 for (SizeT RegAlias : alias_init) { \ |
| 85 assert(!RegisterAliases[RegMIPS32::val][RegAlias] && \ | 84 assert(!RegisterAliases[RegMIPS32::val][RegAlias] && \ |
| 86 "Duplicate alias for " #val); \ | 85 "Duplicate alias for " #val); \ |
| 87 RegisterAliases[RegMIPS32::val].set(RegAlias); \ | 86 RegisterAliases[RegMIPS32::val].set(RegAlias); \ |
| 88 } \ | 87 } \ |
| 89 RegisterAliases[RegMIPS32::val].resize(RegMIPS32::Reg_NUM); \ | 88 RegisterAliases[RegMIPS32::val].resize(RegMIPS32::Reg_NUM); \ |
| 90 assert(RegisterAliases[RegMIPS32::val][RegMIPS32::val]); \ | 89 assert(RegisterAliases[RegMIPS32::val][RegMIPS32::val]); |
| 91 ScratchRegs[RegMIPS32::val] = scratch; | |
| 92 REGMIPS32_TABLE; | 90 REGMIPS32_TABLE; |
| 93 #undef X | 91 #undef X |
| 94 TypeToRegisterSet[IceType_void] = InvalidRegisters; | 92 TypeToRegisterSet[IceType_void] = InvalidRegisters; |
| 95 TypeToRegisterSet[IceType_i1] = IntegerRegisters; | 93 TypeToRegisterSet[IceType_i1] = IntegerRegisters; |
| 96 TypeToRegisterSet[IceType_i8] = IntegerRegisters; | 94 TypeToRegisterSet[IceType_i8] = IntegerRegisters; |
| 97 TypeToRegisterSet[IceType_i16] = IntegerRegisters; | 95 TypeToRegisterSet[IceType_i16] = IntegerRegisters; |
| 98 TypeToRegisterSet[IceType_i32] = IntegerRegisters; | 96 TypeToRegisterSet[IceType_i32] = IntegerRegisters; |
| 99 TypeToRegisterSet[IceType_i64] = IntegerRegisters; | 97 TypeToRegisterSet[IceType_i64] = IntegerRegisters; |
| 100 TypeToRegisterSet[IceType_f32] = Float32Registers; | 98 TypeToRegisterSet[IceType_f32] = Float32Registers; |
| 101 TypeToRegisterSet[IceType_f64] = Float64Registers; | 99 TypeToRegisterSet[IceType_f64] = Float64Registers; |
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| 1111 OstreamLocker L(Ctx); | 1109 OstreamLocker L(Ctx); |
| 1112 Ostream &Str = Ctx->getStrEmit(); | 1110 Ostream &Str = Ctx->getStrEmit(); |
| 1113 Str << "\t.set\t" | 1111 Str << "\t.set\t" |
| 1114 << "nomicromips\n"; | 1112 << "nomicromips\n"; |
| 1115 Str << "\t.set\t" | 1113 Str << "\t.set\t" |
| 1116 << "nomips16\n"; | 1114 << "nomips16\n"; |
| 1117 } | 1115 } |
| 1118 | 1116 |
| 1119 llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[IceType_NUM]; | 1117 llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[IceType_NUM]; |
| 1120 llvm::SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; | 1118 llvm::SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; |
| 1121 llvm::SmallBitVector TargetMIPS32::ScratchRegs; | |
| 1122 | 1119 |
| 1123 } // end of namespace MIPS32 | 1120 } // end of namespace MIPS32 |
| 1124 } // end of namespace Ice | 1121 } // end of namespace Ice |
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