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Side by Side Diff: tests_lit/assembler/arm32/vmov-cast.ll

Issue 1596613002: Clean up handling of ARM IR instruction "mov". (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Reformat. Created 4 years, 11 months ago
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1 ; Show that we know how to translate vadd. 1 ; Show that we know how to translate vmov for casts.
2 2
3 ; NOTE: Restricts S and D registers to ones that will better test S/D 3 ; NOTE: Restricts S register to one that will better test S register encodings.
4 ; register encodings.
5 4
6 ; REQUIRES: allow_dump 5 ; REQUIRES: allow_dump
7 6
8 ; Compile using standalone assembler. 7 ; Compile using standalone assembler.
9 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \ 8 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \
10 ; RUN: -reg-use s20,s22,d20,d22 \ 9 ; RUN: -reg-use s20,s22,d20,d22 \
11 ; RUN: | FileCheck %s --check-prefix=ASM 10 ; RUN: | FileCheck %s --check-prefix=ASM
12 11
13 ; Show bytes in assembled standalone code. 12 ; Show bytes in assembled standalone code.
14 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ 13 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \
15 ; RUN: --args -Om1 \ 14 ; RUN: --args -Om1 \
16 ; RUN: -reg-use s20,s22,d20,d22 \ 15 ; RUN: -reg-use s20,s22,d20,d22 \
17 ; RUN: | FileCheck %s --check-prefix=DIS 16 ; RUN: | FileCheck %s --check-prefix=DIS
18 17
19 ; Compile using integrated assembler. 18 ; Compile using integrated assembler.
20 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \ 19 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \
21 ; RUN: -reg-use s20,s22,d20,d22 \ 20 ; RUN: -reg-use s20,s22,d20,d22 \
22 ; RUN: | FileCheck %s --check-prefix=IASM 21 ; RUN: | FileCheck %s --check-prefix=IASM
23 22
24 ; Show bytes in assembled integrated code. 23 ; Show bytes in assembled integrated code.
25 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ 24 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
26 ; RUN: --args -Om1 \ 25 ; RUN: --args -Om1 \
27 ; RUN: -reg-use s20,s22,d20,d22 \ 26 ; RUN: -reg-use s20,s22,d20,d22 \
28 ; RUN: | FileCheck %s --check-prefix=DIS 27 ; RUN: | FileCheck %s --check-prefix=DIS
29 28
30 define internal float @testVaddFloat(float %v1, float %v2) { 29 define internal float @castToFloat(i32 %a) {
31 ; ASM-LABEL: testVaddFloat: 30 ; ASM-LABEL: castToFloat:
32 ; DIS-LABEL: 00000000 <testVaddFloat>: 31 ; DIS-LABEL: 00000000 <castToFloat>:
33 ; IASM-LABEL: testVaddFloat: 32 ; IASM-LABEL: castToFloat:
34 33
35 entry: 34 entry:
36 %res = fadd float %v1, %v2 35 ; ASM: .LcastToFloat$entry:
36 ; IASM: .LcastToFloat$entry:
37 37
38 ; ASM: vadd.f32 s20, s20, s22 38 %0 = bitcast i32 %a to float
39 ; DIS: 1c: ee3aaa0b
40 ; IASM-NOT: vadd
41 39
42 ret float %res 40 ; ASM: vmov s20, r0
41 ; DIS: 10: ee0a0a10
42 ; IASM-NOT: vmov
43
44 ret float %0
43 } 45 }
44
45 define internal double @testVaddDouble(double %v1, double %v2) {
46 ; ASM-LABEL: testVaddDouble:
47 ; DIS-LABEL: 00000040 <testVaddDouble>:
48 ; IASM-LABEL: .LtestVaddDouble$entry:
49
50 entry:
51 %res = fadd double %v1, %v2
52
53 ; ASM: vadd.f64 d20, d20, d22
54 ; DIS: 54: ee744ba6
55 ; IASM-NOT: vadd
56
57 ret double %res
58 }
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