[Interpreter] Preparation for wide registers.

src/interpreter/bytecodes.cc

 // Copyright 2015 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/interpreter/bytecodes.h"
 
 #include "src/frames.h"
 #include "src/interpreter/bytecode-traits.h"
 
 namespace v8 {
@@ skipping 214 matching lines @@
          IsJumpConstantWide(bytecode);
 }
 
 
 // static
 bool Bytecodes::IsJumpOrReturn(Bytecode bytecode) {
   return bytecode == Bytecode::kReturn || IsJump(bytecode);
 }
 
 
+namespace {
+static Register DecodeRegister(const uint8_t* operand_start,
+                               OperandType operand_type) {
+  switch (Bytecodes::SizeOfOperand(operand_type)) {
+    case OperandSize::kByte:
+      return Register::FromOperand(*operand_start);
+    case OperandSize::kShort:
+      return Register::FromWideOperand(ReadUnalignedUInt16(operand_start));
+    case OperandSize::kNone: {
+      UNREACHABLE();
+    }
+  }
+  return Register();
+}
+}  // namespace
+
+
 // static
 std::ostream& Bytecodes::Decode(std::ostream& os, const uint8_t* bytecode_start,
                                 int parameter_count) {
   Vector<char> buf = Vector<char>::New(50);
 
   Bytecode bytecode = Bytecodes::FromByte(bytecode_start[0]);
   int bytecode_size = Bytecodes::Size(bytecode);
 
   for (int i = 0; i < bytecode_size; i++) {
     SNPrintF(buf, "%02x ", bytecode_start[i]);
     os << buf.start();
   }
   const int kBytecodeColumnSize = 6;
   for (int i = bytecode_size; i < kBytecodeColumnSize; i++) {
     os << "   ";
   }
 
   os << bytecode << " ";
 
   int number_of_operands = NumberOfOperands(bytecode);
   for (int i = 0; i < number_of_operands; i++) {
     OperandType op_type = GetOperandType(bytecode, i);
     const uint8_t* operand_start =
         &bytecode_start[GetOperandOffset(bytecode, i)];
     switch (op_type) {
-      case interpreter::OperandType::kCount8:
+      case interpreter::OperandType::kRegCount8:
         os << "#" << static_cast<unsigned int>(*operand_start);
         break;
-      case interpreter::OperandType::kCount16:
+      case interpreter::OperandType::kRegCount16:
         os << '#' << ReadUnalignedUInt16(operand_start);
         break;
       case interpreter::OperandType::kIdx8:
         os << "[" << static_cast<unsigned int>(*operand_start) << "]";
         break;
       case interpreter::OperandType::kIdx16:
         os << "[" << ReadUnalignedUInt16(operand_start) << "]";
         break;
       case interpreter::OperandType::kImm8:
         os << "#" << static_cast<int>(static_cast<int8_t>(*operand_start));
         break;
+      case interpreter::OperandType::kMaybeReg8:
+      case interpreter::OperandType::kMaybeReg16:
       case interpreter::OperandType::kReg8:
-      case interpreter::OperandType::kMaybeReg8: {
-        Register reg = Register::FromOperand(*operand_start);
+      case interpreter::OperandType::kReg16: {
+        Register reg = DecodeRegister(operand_start, op_type);
         if (reg.is_function_context()) {
           os << "<context>";
         } else if (reg.is_function_closure()) {
           os << "<closure>";
         } else if (reg.is_new_target()) {
           os << "<new.target>";
         } else if (reg.is_parameter()) {
           int parameter_index = reg.ToParameterIndex(parameter_count);
           if (parameter_index == 0) {
             os << "<this>";
           } else {
             os << "a" << parameter_index - 1;
           }
         } else {
           os << "r" << reg.index();
         }
         break;
       }
       case interpreter::OperandType::kRegPair8:
-      case interpreter::OperandType::kRegTriple8: {
-        Register reg = Register::FromOperand(*operand_start);
+      case interpreter::OperandType::kRegTriple8:
+      case interpreter::OperandType::kRegPair16:
+      case interpreter::OperandType::kRegTriple16: {
+        Register reg = DecodeRegister(operand_start, op_type);
         int range = op_type == interpreter::OperandType::kRegPair8 ? 1 : 2;
         if (reg.is_parameter()) {
           int parameter_index = reg.ToParameterIndex(parameter_count);
-          DCHECK_NE(parameter_index, 0);
+          DCHECK_GT(parameter_index, 0);
           os << "a" << parameter_index - range << "-" << parameter_index;
         } else {
           os << "r" << reg.index() << "-" << reg.index() + range;
         }
         break;
       }
-      case interpreter::OperandType::kReg16: {
-        Register reg =
-            Register::FromWideOperand(ReadUnalignedUInt16(operand_start));
-        if (reg.is_parameter()) {
-          int parameter_index = reg.ToParameterIndex(parameter_count);
-          DCHECK_NE(parameter_index, 0);
-          os << "a" << parameter_index - 1;
-        } else {
-          os << "r" << reg.index();
-        }
-        break;
-      }
       case interpreter::OperandType::kNone:
         UNREACHABLE();
         break;
     }
     if (i != number_of_operands - 1) {
       os << ", ";
     }
   }
   return os;
 }
@@ skipping 95 matching lines @@
   DCHECK_LE(index_, kMaxInt16);
   return static_cast<uint16_t>(-index_);
 }
 
 
 Register Register::FromWideOperand(uint16_t operand) {
   return Register(-static_cast<int16_t>(operand));
 }
 
 
+uint32_t Register::ToRawOperand() const {
+  return static_cast<uint32_t>(-index_);
+}
+
+
+Register Register::FromRawOperand(uint32_t operand) {
+  return Register(-static_cast<int32_t>(operand));
+}
+
+
 bool Register::AreContiguous(Register reg1, Register reg2, Register reg3,
                              Register reg4, Register reg5) {
   if (reg1.index() + 1 != reg2.index()) {
     return false;
   }
   if (reg3.is_valid() && reg2.index() + 1 != reg3.index()) {
     return false;
   }
   if (reg4.is_valid() && reg3.index() + 1 != reg4.index()) {
     return false;
   }
   if (reg5.is_valid() && reg4.index() + 1 != reg5.index()) {
     return false;
   }
   return true;
 }
 
 }  // namespace interpreter
 }  // namespace internal
 }  // namespace v8