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| 1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #ifndef V8_MIPS_CONSTANTS_H_ | 5 #ifndef V8_MIPS_CONSTANTS_H_ |
| 6 #define V8_MIPS_CONSTANTS_H_ | 6 #define V8_MIPS_CONSTANTS_H_ |
| 7 #include "src/globals.h" | 7 #include "src/globals.h" |
| 8 // UNIMPLEMENTED_ macro for MIPS. | 8 // UNIMPLEMENTED_ macro for MIPS. |
| 9 #ifdef DEBUG | 9 #ifdef DEBUG |
| 10 #define UNIMPLEMENTED_MIPS() \ | 10 #define UNIMPLEMENTED_MIPS() \ |
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| 383 POP76 = ((7U << 3) + 6) << kOpcodeShift, // bnezc, jialc | 383 POP76 = ((7U << 3) + 6) << kOpcodeShift, // bnezc, jialc |
| 384 | 384 |
| 385 COP1X = ((1U << 4) + 3) << kOpcodeShift, | 385 COP1X = ((1U << 4) + 3) << kOpcodeShift, |
| 386 | 386 |
| 387 // New r6 instruction. | 387 // New r6 instruction. |
| 388 POP06 = BLEZ, // bgeuc/bleuc, blezalc, bgezalc | 388 POP06 = BLEZ, // bgeuc/bleuc, blezalc, bgezalc |
| 389 POP07 = BGTZ, // bltuc/bgtuc, bgtzalc, bltzalc | 389 POP07 = BGTZ, // bltuc/bgtuc, bgtzalc, bltzalc |
| 390 POP10 = ADDI, // beqzalc, bovc, beqc | 390 POP10 = ADDI, // beqzalc, bovc, beqc |
| 391 POP26 = BLEZL, // bgezc, blezc, bgec/blec | 391 POP26 = BLEZL, // bgezc, blezc, bgec/blec |
| 392 POP27 = BGTZL, // bgtzc, bltzc, bltc/bgtc | 392 POP27 = BGTZL, // bgtzc, bltzc, bltc/bgtc |
| 393 POP30 = DADDI, // bnezalc, bvnc, bnec | 393 POP30 = DADDI, // bnezalc, bnvc, bnec |
| 394 }; | 394 }; |
| 395 | 395 |
| 396 enum SecondaryField : uint32_t { | 396 enum SecondaryField : uint32_t { |
| 397 // SPECIAL Encoding of Function Field. | 397 // SPECIAL Encoding of Function Field. |
| 398 SLL = ((0U << 3) + 0), | 398 SLL = ((0U << 3) + 0), |
| 399 MOVCI = ((0U << 3) + 1), | 399 MOVCI = ((0U << 3) + 1), |
| 400 SRL = ((0U << 3) + 2), | 400 SRL = ((0U << 3) + 2), |
| 401 SRA = ((0U << 3) + 3), | 401 SRA = ((0U << 3) + 3), |
| 402 SLLV = ((0U << 3) + 4), | 402 SLLV = ((0U << 3) + 4), |
| 403 LSA = ((0U << 3) + 5), | 403 LSA = ((0U << 3) + 5), |
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| 1217 } | 1217 } |
| 1218 } | 1218 } |
| 1219 } | 1219 } |
| 1220 | 1220 |
| 1221 #undef OpcodeToBitNumber | 1221 #undef OpcodeToBitNumber |
| 1222 #undef FunctionFieldToBitNumber | 1222 #undef FunctionFieldToBitNumber |
| 1223 } // namespace internal | 1223 } // namespace internal |
| 1224 } // namespace v8 | 1224 } // namespace v8 |
| 1225 | 1225 |
| 1226 #endif // #ifndef V8_MIPS_CONSTANTS_H_ | 1226 #endif // #ifndef V8_MIPS_CONSTANTS_H_ |
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