Enables more VM tests for SIMMIPS.

runtime/vm/stub_code_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/assembler.h"
 #include "vm/code_generator.h"
 #include "vm/compiler.h"
@@ skipping 22 matching lines @@
 //   SP + 4*S4 - 4 : address of first argument in argument array.
 //   SP + 4*S4 : address of return value.
 //   S5 : address of the runtime function to call.
 //   S4 : number of arguments to the call.
 void StubCode::GenerateCallToRuntimeStub(Assembler* assembler) {
   const intptr_t isolate_offset = NativeArguments::isolate_offset();
   const intptr_t argc_tag_offset = NativeArguments::argc_tag_offset();
   const intptr_t argv_offset = NativeArguments::argv_offset();
   const intptr_t retval_offset = NativeArguments::retval_offset();
 
+  __ SetPrologueOffset();
   __ TraceSimMsg("CallToRuntimeStub");
   __ addiu(SP, SP, Immediate(-2 * kWordSize));
   __ sw(RA, Address(SP, 1 * kWordSize));
   __ sw(FP, Address(SP, 0 * kWordSize));
   __ mov(FP, SP);
 
-  // Load current Isolate pointer from Context structure into R0.
+  // Load current Isolate pointer from Context structure into A0.
   __ lw(A0, FieldAddress(CTX, Context::isolate_offset()));
 
   // Save exit frame information to enable stack walking as we are about
   // to transition to Dart VM C++ code.
   __ sw(SP, Address(A0, Isolate::top_exit_frame_info_offset()));
 
   // Save current Context pointer into Isolate structure.
   __ sw(CTX, Address(A0, Isolate::top_context_offset()));
 
   // Cache Isolate pointer into CTX while executing runtime code.
@@ skipping 75 matching lines @@
 //   SP : address of return value.
 //   T5 : address of the native function to call.
 //   A2 : address of first argument in argument array.
 //   A1 : argc_tag including number of arguments and function kind.
 void StubCode::GenerateCallNativeCFunctionStub(Assembler* assembler) {
   const intptr_t isolate_offset = NativeArguments::isolate_offset();
   const intptr_t argc_tag_offset = NativeArguments::argc_tag_offset();
   const intptr_t argv_offset = NativeArguments::argv_offset();
   const intptr_t retval_offset = NativeArguments::retval_offset();
 
+  __ SetPrologueOffset();
   __ TraceSimMsg("CallNativeCFunctionStub");
   __ addiu(SP, SP, Immediate(-2 * kWordSize));
   __ sw(RA, Address(SP, 1 * kWordSize));
   __ sw(FP, Address(SP, 0 * kWordSize));
   __ mov(FP, SP);
 
   // Load current Isolate pointer from Context structure into A0.
   __ lw(A0, FieldAddress(CTX, Context::isolate_offset()));
 
   // Save exit frame information to enable stack walking as we are about
   // to transition to native code.
   __ sw(SP, Address(A0, Isolate::top_exit_frame_info_offset()));
 
   // Save current Context pointer into Isolate structure.
   __ sw(CTX, Address(A0, Isolate::top_context_offset()));
 
   // Cache Isolate pointer into CTX while executing native code.
   __ mov(CTX, A0);
 
   // Initialize NativeArguments structure and call native function.
   // Registers A0, A1, A2, and A3 are used.
 
   ASSERT(isolate_offset == 0 * kWordSize);
   // Set isolate in NativeArgs: A0 already contains CTX.
 
   // There are no native calls to closures, so we do not need to set the tag
   // bits kClosureFunctionBit and kInstanceFunctionBit in argc_tag_.
   ASSERT(argc_tag_offset == 1 * kWordSize);
-  // Set argc in NativeArguments: T1 already contains argc.
+  // Set argc in NativeArguments: A1 already contains argc.
 
   ASSERT(argv_offset == 2 * kWordSize);
-  // Set argv in NativeArguments: T2 already contains argv.
+  // Set argv in NativeArguments: A2 already contains argv.
 
   ASSERT(retval_offset == 3 * kWordSize);
   __ addiu(A3, FP, Immediate(2 * kWordSize));  // Set retval in NativeArgs.
 
   // TODO(regis): Should we pass the structure by value as in runtime calls?
   // It would require changing Dart API for native functions.
   // For now, space is reserved on the stack and we pass a pointer to it.
   __ addiu(SP, SP, Immediate(-4 * kWordSize));
   __ sw(A3, Address(SP, 3 * kWordSize));
   __ sw(A2, Address(SP, 2 * kWordSize));
@@ skipping 158 matching lines @@
 }
 
 
 DECLARE_LEAF_RUNTIME_ENTRY(intptr_t, DeoptimizeCopyFrame,
                            intptr_t deopt_reason,
                            uword saved_registers_address);
 
 DECLARE_LEAF_RUNTIME_ENTRY(void, DeoptimizeFillFrame, uword last_fp);
 
 
-
-
 // Used by eager and lazy deoptimization. Preserve result in V0 if necessary.
 // This stub translates optimized frame into unoptimized frame. The optimized
 // frame can contain values in registers and on stack, the unoptimized
 // frame contains all values on stack.
 // Deoptimization occurs in following steps:
 // - Push all registers that can contain values.
 // - Call C routine to copy the stack and saved registers into temporary buffer.
 // - Adjust caller's frame to correct unoptimized frame size.
 // - Fill the unoptimized frame.
 // - Materialize objects that require allocation (e.g. Double instances).
 // GC can occur only after frame is fully rewritten.
 // Stack after EnterFrame(...) below:
 //   +------------------+
 //   | Saved PP         | <- TOS
 //   +------------------+
 //   | Saved FP         | <- FP of stub
 //   +------------------+
 //   | Saved LR         |  (deoptimization point)
 //   +------------------+
 //   | PC marker        |
 //   +------------------+
 //   | ...              | <- SP of optimized frame
 //
 // Parts of the code cannot GC, part of the code can GC.
 static void GenerateDeoptimizationSequence(Assembler* assembler,
                                            bool preserve_result) {
-  __ TraceSimMsg("GenerateDeoptimizationSequence");
   const intptr_t kPushedRegistersSize =
       kNumberOfCpuRegisters * kWordSize +
       4 * kWordSize +  // PP, FP, RA, PC marker.
       kNumberOfFRegisters * kWordSize;
 
+  __ SetPrologueOffset();
+  __ TraceSimMsg("GenerateDeoptimizationSequence");
   // DeoptimizeCopyFrame expects a Dart frame, i.e. EnterDartFrame(0), but there
   // is no need to set the correct PC marker or load PP, since they get patched.
   __ addiu(SP, SP, Immediate(-kPushedRegistersSize * kWordSize));
   __ sw(ZR, Address(SP, kPushedRegistersSize - 1 * kWordSize));
   __ sw(RA, Address(SP, kPushedRegistersSize - 2 * kWordSize));
   __ sw(FP, Address(SP, kPushedRegistersSize - 3 * kWordSize));
   __ sw(PP, Address(SP, kPushedRegistersSize - 4 * kWordSize));
   __ addiu(FP, SP, Immediate(kPushedRegistersSize - 3 * kWordSize));
 
   // The code in this frame may not cause GC. kDeoptimizeCopyFrameRuntimeEntry
@@ skipping 13 matching lines @@
     __ sw(reg, Address(SP, kPushedRegistersSize - slot * kWordSize));
   }
   for (int i = 0; i < kNumberOfFRegisters; i++) {
     // These go below the CPU registers.
     const int slot = 4 + kNumberOfCpuRegisters + kNumberOfFRegisters - i;
     FRegister reg = static_cast<FRegister>(i);
     __ swc1(reg, Address(SP, kPushedRegistersSize - slot * kWordSize));
   }
 
   __ mov(A0, SP);  // Pass address of saved registers block.
-  __ ReserveAlignedFrameSpace(0);
+  __ ReserveAlignedFrameSpace(1 * kWordSize);
   __ CallRuntime(kDeoptimizeCopyFrameRuntimeEntry);
   // Result (V0) is stack-size (FP - SP) in bytes, incl. the return address.
 
   if (preserve_result) {
     // Restore result into T1 temporarily.
     __ lw(T1, Address(FP, saved_result_slot_from_fp * kWordSize));
   }
 
   __ addiu(SP, FP, Immediate(-kWordSize));
   __ lw(RA, Address(SP, 2 * kWordSize));
   __ lw(FP, Address(SP, 1 * kWordSize));
   __ lw(PP, Address(SP, 0 * kWordSize));
   __ subu(SP, FP, V0);
 
   // DeoptimizeFillFrame expects a Dart frame, i.e. EnterDartFrame(0), but there
   // is no need to set the correct PC marker or load PP, since they get patched.
   __ addiu(SP, SP, Immediate(-4 * kWordSize));
   __ sw(ZR, Address(SP, 3 * kWordSize));
   __ sw(RA, Address(SP, 2 * kWordSize));
   __ sw(FP, Address(SP, 1 * kWordSize));
   __ sw(PP, Address(SP, 0 * kWordSize));
   __ addiu(FP, SP, Immediate(kWordSize));
 
   __ mov(A0, FP);  // Get last FP address.
   if (preserve_result) {
     __ Push(T1);  // Preserve result as first local.
   }
-  __ ReserveAlignedFrameSpace(0);
+  __ ReserveAlignedFrameSpace(1 * kWordSize);
   __ CallRuntime(kDeoptimizeFillFrameRuntimeEntry);  // Pass last FP in A0.
   if (preserve_result) {
     // Restore result into T1.
     __ lw(T1, Address(FP, kFirstLocalSlotFromFp * kWordSize));
   }
   // Code above cannot cause GC.
   __ addiu(SP, FP, Immediate(-kWordSize));
   __ lw(RA, Address(SP, 2 * kWordSize));
   __ lw(FP, Address(SP, 1 * kWordSize));
   __ lw(PP, Address(SP, 0 * kWordSize));
@@ skipping 1176 matching lines @@
 
   __ LoadImmediate(T1, Smi::RawValue(Smi::kMaxValue));
   __ sw(T1, Address(T0, count_offset));
 
   __ Bind(&call_target_function);
   // T3: Target function.
   __ lw(T3, FieldAddress(T3, Function::code_offset()));
   __ lw(T3, FieldAddress(T3, Code::instructions_offset()));
   __ AddImmediate(T3, Instructions::HeaderSize() - kHeapObjectTag);
   __ jr(T3);
-  __ delay_slot()->addiu(T3, T3,
-      Immediate(Instructions::HeaderSize() - kHeapObjectTag));
 
   // Instance in T3, return its class-id in T3 as Smi.
   __ Bind(&get_class_id_as_smi);
   Label not_smi;
   // Test if Smi -> load Smi class for comparison.
   __ andi(TMP1, T3, Immediate(kSmiTagMask));
   __ bne(TMP1, ZR, &not_smi);
   __ jr(RA);
   __ delay_slot()->addiu(T3, ZR, Immediate(Smi::RawValue(kSmiCid)));
 
@@ skipping 281 matching lines @@
 
 // Implements equality operator when one of the arguments is null
 // (identity check) and updates ICData if necessary.
 // RA: return address.
 // A1: left argument.
 // A0: right argument.
 // T0: ICData.
 // V0: result.
 // TODO(srdjan): Move to VM stubs once Boolean objects become VM objects.
 void StubCode::GenerateEqualityWithNullArgStub(Assembler* assembler) {
+  __ TraceSimMsg("EqualityWithNullArgStub");
   __ EnterStubFrame();
   static const intptr_t kNumArgsTested = 2;
 #if defined(DEBUG)
   { Label ok;
     __ lw(TMP1, FieldAddress(T0, ICData::num_args_tested_offset()));
     __ BranchEqual(TMP1, kNumArgsTested, &ok);
     __ Stop("Incorrect ICData for equality");
     __ Bind(&ok);
   }
 #endif  // DEBUG
@@ skipping 202 matching lines @@
   __ mov(TMP1, ZR);
   __ lw(T0, Address(SP, 0 * kWordSize));
   __ lw(T1, Address(SP, 1 * kWordSize));
   __ Ret();
   __ delay_slot()->addiu(SP, SP, Immediate(2 * kWordSize));
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS