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Issue 1593313010: Revert of [turbofan] Implement rounding of floats on x64 and ia32 without sse4.1. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 11 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
(...skipping 1062 matching lines...) Expand 10 before | Expand all | Expand 10 after
1073 1073
1074 void psllq(XMMRegister reg, byte imm8); 1074 void psllq(XMMRegister reg, byte imm8);
1075 void psrlq(XMMRegister reg, byte imm8); 1075 void psrlq(XMMRegister reg, byte imm8);
1076 void pslld(XMMRegister reg, byte imm8); 1076 void pslld(XMMRegister reg, byte imm8);
1077 void psrld(XMMRegister reg, byte imm8); 1077 void psrld(XMMRegister reg, byte imm8);
1078 1078
1079 void cvttsd2si(Register dst, const Operand& src); 1079 void cvttsd2si(Register dst, const Operand& src);
1080 void cvttsd2si(Register dst, XMMRegister src); 1080 void cvttsd2si(Register dst, XMMRegister src);
1081 void cvttss2siq(Register dst, XMMRegister src); 1081 void cvttss2siq(Register dst, XMMRegister src);
1082 void cvttss2siq(Register dst, const Operand& src); 1082 void cvttss2siq(Register dst, const Operand& src);
1083 void cvtss2siq(Register dst, XMMRegister src);
1084 void cvtss2siq(Register dst, const Operand& src);
1085 void cvttsd2siq(Register dst, XMMRegister src); 1083 void cvttsd2siq(Register dst, XMMRegister src);
1086 void cvttsd2siq(Register dst, const Operand& src); 1084 void cvttsd2siq(Register dst, const Operand& src);
1087 1085
1088 void cvtlsi2sd(XMMRegister dst, const Operand& src); 1086 void cvtlsi2sd(XMMRegister dst, const Operand& src);
1089 void cvtlsi2sd(XMMRegister dst, Register src); 1087 void cvtlsi2sd(XMMRegister dst, Register src);
1090 1088
1091 void cvtqsi2ss(XMMRegister dst, const Operand& src); 1089 void cvtqsi2ss(XMMRegister dst, const Operand& src);
1092 void cvtqsi2ss(XMMRegister dst, Register src); 1090 void cvtqsi2ss(XMMRegister dst, Register src);
1093 1091
1094 void cvtqsi2sd(XMMRegister dst, const Operand& src); 1092 void cvtqsi2sd(XMMRegister dst, const Operand& src);
1095 void cvtqsi2sd(XMMRegister dst, Register src); 1093 void cvtqsi2sd(XMMRegister dst, Register src);
1096 1094
1097 1095
1098 void cvtss2sd(XMMRegister dst, XMMRegister src); 1096 void cvtss2sd(XMMRegister dst, XMMRegister src);
1099 void cvtss2sd(XMMRegister dst, const Operand& src); 1097 void cvtss2sd(XMMRegister dst, const Operand& src);
1100 void cvtsd2ss(XMMRegister dst, XMMRegister src); 1098 void cvtsd2ss(XMMRegister dst, XMMRegister src);
1101 void cvtsd2ss(XMMRegister dst, const Operand& src); 1099 void cvtsd2ss(XMMRegister dst, const Operand& src);
1102 1100
1103 void cvtsd2si(Register dst, XMMRegister src); 1101 void cvtsd2si(Register dst, XMMRegister src);
1104 void cvtsd2siq(Register dst, XMMRegister src); 1102 void cvtsd2siq(Register dst, XMMRegister src);
1105 void cvtsd2siq(Register dst, const Operand& src);
1106 1103
1107 void addsd(XMMRegister dst, XMMRegister src); 1104 void addsd(XMMRegister dst, XMMRegister src);
1108 void addsd(XMMRegister dst, const Operand& src); 1105 void addsd(XMMRegister dst, const Operand& src);
1109 void subsd(XMMRegister dst, XMMRegister src); 1106 void subsd(XMMRegister dst, XMMRegister src);
1110 void subsd(XMMRegister dst, const Operand& src); 1107 void subsd(XMMRegister dst, const Operand& src);
1111 void mulsd(XMMRegister dst, XMMRegister src); 1108 void mulsd(XMMRegister dst, XMMRegister src);
1112 void mulsd(XMMRegister dst, const Operand& src); 1109 void mulsd(XMMRegister dst, const Operand& src);
1113 void divsd(XMMRegister dst, XMMRegister src); 1110 void divsd(XMMRegister dst, XMMRegister src);
1114 void divsd(XMMRegister dst, const Operand& src); 1111 void divsd(XMMRegister dst, const Operand& src);
1115 1112
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1138 void extractps(Register dst, XMMRegister src, byte imm8); 1135 void extractps(Register dst, XMMRegister src, byte imm8);
1139 1136
1140 void pextrd(Register dst, XMMRegister src, int8_t imm8); 1137 void pextrd(Register dst, XMMRegister src, int8_t imm8);
1141 1138
1142 void pinsrd(XMMRegister dst, Register src, int8_t imm8); 1139 void pinsrd(XMMRegister dst, Register src, int8_t imm8);
1143 void pinsrd(XMMRegister dst, const Operand& src, int8_t imm8); 1140 void pinsrd(XMMRegister dst, const Operand& src, int8_t imm8);
1144 1141
1145 void roundss(XMMRegister dst, XMMRegister src, RoundingMode mode); 1142 void roundss(XMMRegister dst, XMMRegister src, RoundingMode mode);
1146 void roundsd(XMMRegister dst, XMMRegister src, RoundingMode mode); 1143 void roundsd(XMMRegister dst, XMMRegister src, RoundingMode mode);
1147 1144
1148 void ldmxcsr(const Operand& dst);
1149 void stmxcsr(const Operand& dst);
1150
1151 // AVX instruction 1145 // AVX instruction
1152 void vfmadd132sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { 1146 void vfmadd132sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1153 vfmasd(0x99, dst, src1, src2); 1147 vfmasd(0x99, dst, src1, src2);
1154 } 1148 }
1155 void vfmadd213sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { 1149 void vfmadd213sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1156 vfmasd(0xa9, dst, src1, src2); 1150 vfmasd(0xa9, dst, src1, src2);
1157 } 1151 }
1158 void vfmadd231sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { 1152 void vfmadd231sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1159 vfmasd(0xb9, dst, src1, src2); 1153 vfmasd(0xb9, dst, src1, src2);
1160 } 1154 }
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1415 vsd(0x2c, idst, xmm0, src, kF2, k0F, kW0); 1409 vsd(0x2c, idst, xmm0, src, kF2, k0F, kW0);
1416 } 1410 }
1417 void vcvttss2siq(Register dst, XMMRegister src) { 1411 void vcvttss2siq(Register dst, XMMRegister src) {
1418 XMMRegister idst = {dst.code()}; 1412 XMMRegister idst = {dst.code()};
1419 vsd(0x2c, idst, xmm0, src, kF3, k0F, kW1); 1413 vsd(0x2c, idst, xmm0, src, kF3, k0F, kW1);
1420 } 1414 }
1421 void vcvttss2siq(Register dst, const Operand& src) { 1415 void vcvttss2siq(Register dst, const Operand& src) {
1422 XMMRegister idst = {dst.code()}; 1416 XMMRegister idst = {dst.code()};
1423 vsd(0x2c, idst, xmm0, src, kF3, k0F, kW1); 1417 vsd(0x2c, idst, xmm0, src, kF3, k0F, kW1);
1424 } 1418 }
1425 void vcvtss2siq(Register dst, XMMRegister src) {
1426 XMMRegister idst = {dst.code()};
1427 vsd(0x2d, idst, xmm0, src, kF3, k0F, kW1);
1428 }
1429 void vcvtss2siq(Register dst, const Operand& src) {
1430 XMMRegister idst = {dst.code()};
1431 vsd(0x2d, idst, xmm0, src, kF3, k0F, kW1);
1432 }
1433 void vcvttsd2siq(Register dst, XMMRegister src) { 1419 void vcvttsd2siq(Register dst, XMMRegister src) {
1434 XMMRegister idst = {dst.code()}; 1420 XMMRegister idst = {dst.code()};
1435 vsd(0x2c, idst, xmm0, src, kF2, k0F, kW1); 1421 vsd(0x2c, idst, xmm0, src, kF2, k0F, kW1);
1436 } 1422 }
1437 void vcvttsd2siq(Register dst, const Operand& src) { 1423 void vcvttsd2siq(Register dst, const Operand& src) {
1438 XMMRegister idst = {dst.code()}; 1424 XMMRegister idst = {dst.code()};
1439 vsd(0x2c, idst, xmm0, src, kF2, k0F, kW1); 1425 vsd(0x2c, idst, xmm0, src, kF2, k0F, kW1);
1440 } 1426 }
1441 void vcvtsd2siq(Register dst, XMMRegister src) {
1442 XMMRegister idst = {dst.code()};
1443 vsd(0x2d, idst, xmm0, src, kF2, k0F, kW1);
1444 }
1445 void vcvtsd2siq(Register dst, const Operand& src) {
1446 XMMRegister idst = {dst.code()};
1447 vsd(0x2d, idst, xmm0, src, kF2, k0F, kW1);
1448 }
1449 void vcvtsd2si(Register dst, XMMRegister src) { 1427 void vcvtsd2si(Register dst, XMMRegister src) {
1450 XMMRegister idst = {dst.code()}; 1428 XMMRegister idst = {dst.code()};
1451 vsd(0x2d, idst, xmm0, src, kF2, k0F, kW0); 1429 vsd(0x2d, idst, xmm0, src, kF2, k0F, kW0);
1452 } 1430 }
1453 void vucomisd(XMMRegister dst, XMMRegister src) { 1431 void vucomisd(XMMRegister dst, XMMRegister src) {
1454 vsd(0x2e, dst, xmm0, src, k66, k0F, kWIG); 1432 vsd(0x2e, dst, xmm0, src, k66, k0F, kWIG);
1455 } 1433 }
1456 void vucomisd(XMMRegister dst, const Operand& src) { 1434 void vucomisd(XMMRegister dst, const Operand& src) {
1457 vsd(0x2e, dst, xmm0, src, k66, k0F, kWIG); 1435 vsd(0x2e, dst, xmm0, src, k66, k0F, kWIG);
1458 } 1436 }
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2227 Assembler* assembler_; 2205 Assembler* assembler_;
2228 #ifdef DEBUG 2206 #ifdef DEBUG
2229 int space_before_; 2207 int space_before_;
2230 #endif 2208 #endif
2231 }; 2209 };
2232 2210
2233 } // namespace internal 2211 } // namespace internal
2234 } // namespace v8 2212 } // namespace v8
2235 2213
2236 #endif // V8_X64_ASSEMBLER_X64_H_ 2214 #endif // V8_X64_ASSEMBLER_X64_H_
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