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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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947 void mulps(XMMRegister dst, const Operand& src); | 947 void mulps(XMMRegister dst, const Operand& src); |
948 void mulps(XMMRegister dst, XMMRegister src) { mulps(dst, Operand(src)); } | 948 void mulps(XMMRegister dst, XMMRegister src) { mulps(dst, Operand(src)); } |
949 void divps(XMMRegister dst, const Operand& src); | 949 void divps(XMMRegister dst, const Operand& src); |
950 void divps(XMMRegister dst, XMMRegister src) { divps(dst, Operand(src)); } | 950 void divps(XMMRegister dst, XMMRegister src) { divps(dst, Operand(src)); } |
951 | 951 |
952 // SSE2 instructions | 952 // SSE2 instructions |
953 void cvttss2si(Register dst, const Operand& src); | 953 void cvttss2si(Register dst, const Operand& src); |
954 void cvttss2si(Register dst, XMMRegister src) { | 954 void cvttss2si(Register dst, XMMRegister src) { |
955 cvttss2si(dst, Operand(src)); | 955 cvttss2si(dst, Operand(src)); |
956 } | 956 } |
957 void cvtss2si(Register dst, const Operand& src); | |
958 void cvtss2si(Register dst, XMMRegister src) { cvtss2si(dst, Operand(src)); } | |
959 void cvttsd2si(Register dst, const Operand& src); | 957 void cvttsd2si(Register dst, const Operand& src); |
960 void cvttsd2si(Register dst, XMMRegister src) { | 958 void cvttsd2si(Register dst, XMMRegister src) { |
961 cvttsd2si(dst, Operand(src)); | 959 cvttsd2si(dst, Operand(src)); |
962 } | 960 } |
963 void cvtsd2si(Register dst, const Operand& src); | |
964 void cvtsd2si(Register dst, XMMRegister src); | 961 void cvtsd2si(Register dst, XMMRegister src); |
965 | 962 |
966 void cvtsi2ss(XMMRegister dst, Register src) { cvtsi2ss(dst, Operand(src)); } | 963 void cvtsi2ss(XMMRegister dst, Register src) { cvtsi2ss(dst, Operand(src)); } |
967 void cvtsi2ss(XMMRegister dst, const Operand& src); | 964 void cvtsi2ss(XMMRegister dst, const Operand& src); |
968 void cvtsi2sd(XMMRegister dst, Register src) { cvtsi2sd(dst, Operand(src)); } | 965 void cvtsi2sd(XMMRegister dst, Register src) { cvtsi2sd(dst, Operand(src)); } |
969 void cvtsi2sd(XMMRegister dst, const Operand& src); | 966 void cvtsi2sd(XMMRegister dst, const Operand& src); |
970 void cvtss2sd(XMMRegister dst, const Operand& src); | 967 void cvtss2sd(XMMRegister dst, const Operand& src); |
971 void cvtss2sd(XMMRegister dst, XMMRegister src) { | 968 void cvtss2sd(XMMRegister dst, XMMRegister src) { |
972 cvtss2sd(dst, Operand(src)); | 969 cvtss2sd(dst, Operand(src)); |
973 } | 970 } |
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989 | 986 |
990 void andpd(XMMRegister dst, XMMRegister src); | 987 void andpd(XMMRegister dst, XMMRegister src); |
991 void orpd(XMMRegister dst, XMMRegister src); | 988 void orpd(XMMRegister dst, XMMRegister src); |
992 | 989 |
993 void ucomisd(XMMRegister dst, XMMRegister src) { ucomisd(dst, Operand(src)); } | 990 void ucomisd(XMMRegister dst, XMMRegister src) { ucomisd(dst, Operand(src)); } |
994 void ucomisd(XMMRegister dst, const Operand& src); | 991 void ucomisd(XMMRegister dst, const Operand& src); |
995 | 992 |
996 void roundss(XMMRegister dst, XMMRegister src, RoundingMode mode); | 993 void roundss(XMMRegister dst, XMMRegister src, RoundingMode mode); |
997 void roundsd(XMMRegister dst, XMMRegister src, RoundingMode mode); | 994 void roundsd(XMMRegister dst, XMMRegister src, RoundingMode mode); |
998 | 995 |
999 void ldmxcsr(const Operand& dst); | |
1000 void stmxcsr(const Operand& dst); | |
1001 | |
1002 void movmskpd(Register dst, XMMRegister src); | 996 void movmskpd(Register dst, XMMRegister src); |
1003 void movmskps(Register dst, XMMRegister src); | 997 void movmskps(Register dst, XMMRegister src); |
1004 | 998 |
1005 void cmpltsd(XMMRegister dst, XMMRegister src); | 999 void cmpltsd(XMMRegister dst, XMMRegister src); |
1006 void pcmpeqd(XMMRegister dst, XMMRegister src); | 1000 void pcmpeqd(XMMRegister dst, XMMRegister src); |
1007 | 1001 |
1008 void punpckldq(XMMRegister dst, XMMRegister src); | 1002 void punpckldq(XMMRegister dst, XMMRegister src); |
1009 void punpckhdq(XMMRegister dst, XMMRegister src); | 1003 void punpckhdq(XMMRegister dst, XMMRegister src); |
1010 | 1004 |
1011 void maxsd(XMMRegister dst, XMMRegister src) { maxsd(dst, Operand(src)); } | 1005 void maxsd(XMMRegister dst, XMMRegister src) { maxsd(dst, Operand(src)); } |
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1494 // instruction generation | 1488 // instruction generation |
1495 void emit_arith_b(int op1, int op2, Register dst, int imm8); | 1489 void emit_arith_b(int op1, int op2, Register dst, int imm8); |
1496 | 1490 |
1497 // Emit a basic arithmetic instruction (i.e. first byte of the family is 0x81) | 1491 // Emit a basic arithmetic instruction (i.e. first byte of the family is 0x81) |
1498 // with a given destination expression and an immediate operand. It attempts | 1492 // with a given destination expression and an immediate operand. It attempts |
1499 // to use the shortest encoding possible. | 1493 // to use the shortest encoding possible. |
1500 // sel specifies the /n in the modrm byte (see the Intel PRM). | 1494 // sel specifies the /n in the modrm byte (see the Intel PRM). |
1501 void emit_arith(int sel, Operand dst, const Immediate& x); | 1495 void emit_arith(int sel, Operand dst, const Immediate& x); |
1502 | 1496 |
1503 void emit_operand(Register reg, const Operand& adr); | 1497 void emit_operand(Register reg, const Operand& adr); |
1504 void emit_operand(int code, const Operand& adr); | |
1505 | 1498 |
1506 void emit_label(Label* label); | 1499 void emit_label(Label* label); |
1507 | 1500 |
1508 void emit_farith(int b1, int b2, int i); | 1501 void emit_farith(int b1, int b2, int i); |
1509 | 1502 |
1510 // Emit vex prefix | 1503 // Emit vex prefix |
1511 enum SIMDPrefix { kNone = 0x0, k66 = 0x1, kF3 = 0x2, kF2 = 0x3 }; | 1504 enum SIMDPrefix { kNone = 0x0, k66 = 0x1, kF3 = 0x2, kF2 = 0x3 }; |
1512 enum VectorLength { kL128 = 0x0, kL256 = 0x4, kLIG = kL128, kLZ = kL128 }; | 1505 enum VectorLength { kL128 = 0x0, kL256 = 0x4, kLIG = kL128, kLZ = kL128 }; |
1513 enum VexW { kW0 = 0x0, kW1 = 0x80, kWIG = kW0 }; | 1506 enum VexW { kW0 = 0x0, kW1 = 0x80, kWIG = kW0 }; |
1514 enum LeadingOpcode { k0F = 0x1, k0F38 = 0x2, k0F3A = 0x3 }; | 1507 enum LeadingOpcode { k0F = 0x1, k0F38 = 0x2, k0F3A = 0x3 }; |
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1575 Assembler* assembler_; | 1568 Assembler* assembler_; |
1576 #ifdef DEBUG | 1569 #ifdef DEBUG |
1577 int space_before_; | 1570 int space_before_; |
1578 #endif | 1571 #endif |
1579 }; | 1572 }; |
1580 | 1573 |
1581 } // namespace internal | 1574 } // namespace internal |
1582 } // namespace v8 | 1575 } // namespace v8 |
1583 | 1576 |
1584 #endif // V8_IA32_ASSEMBLER_IA32_H_ | 1577 #endif // V8_IA32_ASSEMBLER_IA32_H_ |
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