| Index: src/IceTargetLoweringX8632.cpp
|
| diff --git a/src/IceTargetLoweringX8632.cpp b/src/IceTargetLoweringX8632.cpp
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| index bff2066445663c56c22c299d9921d9737316aa33..c154901f9ce6deded22d4001ad139172810b5160 100644
|
| --- a/src/IceTargetLoweringX8632.cpp
|
| +++ b/src/IceTargetLoweringX8632.cpp
|
| @@ -153,259 +153,46 @@ void TargetX8632::lowerIndirectJump(Variable *JumpTarget) {
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| _jmp(JumpTarget);
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| }
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|
|
| -void TargetX8632::lowerCall(const InstCall *Instr) {
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| - // x86-32 calling convention:
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| - //
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| - // * At the point before the call, the stack must be aligned to 16 bytes.
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| - //
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| - // * The first four arguments of vector type, regardless of their position
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| - // relative to the other arguments in the argument list, are placed in
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| - // registers xmm0 - xmm3.
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| - //
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| - // * Other arguments are pushed onto the stack in right-to-left order, such
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| - // that the left-most argument ends up on the top of the stack at the lowest
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| - // memory address.
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| - //
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| - // * Stack arguments of vector type are aligned to start at the next highest
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| - // multiple of 16 bytes. Other stack arguments are aligned to 4 bytes.
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| - //
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| - // This intends to match the section "IA-32 Function Calling Convention" of
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| - // the document "OS X ABI Function Call Guide" by Apple.
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| - NeedsStackAlignment = true;
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| -
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| - OperandList XmmArgs;
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| - OperandList StackArgs, StackArgLocations;
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| - int32_t ParameterAreaSizeBytes = 0;
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| -
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| - // Classify each argument operand according to the location where the
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| - // argument is passed.
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| - for (SizeT i = 0, NumArgs = Instr->getNumArgs(); i < NumArgs; ++i) {
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| - Operand *Arg = Instr->getArg(i);
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| - Type Ty = Arg->getType();
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| - // The PNaCl ABI requires the width of arguments to be at least 32 bits.
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| - assert(typeWidthInBytes(Ty) >= 4);
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| - if (isVectorType(Ty) && XmmArgs.size() < Traits::X86_MAX_XMM_ARGS) {
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| - XmmArgs.push_back(Arg);
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| - } else {
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| - StackArgs.push_back(Arg);
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| - if (isVectorType(Arg->getType())) {
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| - ParameterAreaSizeBytes =
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| - Traits::applyStackAlignment(ParameterAreaSizeBytes);
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| - }
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| - Variable *esp =
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| - Func->getTarget()->getPhysicalRegister(Traits::RegisterSet::Reg_esp);
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| - Constant *Loc = Ctx->getConstantInt32(ParameterAreaSizeBytes);
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| - auto *Mem = Traits::X86OperandMem::create(Func, Ty, esp, Loc);
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| - StackArgLocations.push_back(Mem);
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| - ParameterAreaSizeBytes += typeWidthInBytesOnStack(Arg->getType());
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| - }
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| - }
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| - // Ensure there is enough space for the fstp/movs for floating returns.
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| - Variable *Dest = Instr->getDest();
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| - if (Dest != nullptr && isScalarFloatingType(Dest->getType())) {
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| - ParameterAreaSizeBytes =
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| - std::max(static_cast<size_t>(ParameterAreaSizeBytes),
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| - typeWidthInBytesOnStack(Dest->getType()));
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| - }
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| -
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| - // Adjust the parameter area so that the stack is aligned. It is assumed that
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| - // the stack is already aligned at the start of the calling sequence.
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| - ParameterAreaSizeBytes = Traits::applyStackAlignment(ParameterAreaSizeBytes);
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| - assert(static_cast<uint32_t>(ParameterAreaSizeBytes) <=
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| - maxOutArgsSizeBytes());
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| -
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| - // Copy arguments that are passed on the stack to the appropriate stack
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| - // locations.
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| - for (SizeT i = 0, e = StackArgs.size(); i < e; ++i) {
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| - lowerStore(InstStore::create(Func, StackArgs[i], StackArgLocations[i]));
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| - }
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| -
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| - // Copy arguments to be passed in registers to the appropriate registers.
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| - // TODO: Investigate the impact of lowering arguments passed in registers
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| - // after lowering stack arguments as opposed to the other way around.
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| - // Lowering register arguments after stack arguments may reduce register
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| - // pressure. On the other hand, lowering register arguments first (before
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| - // stack arguments) may result in more compact code, as the memory operand
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| - // displacements may end up being smaller before any stack adjustment is
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| - // done.
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| - for (SizeT i = 0, NumXmmArgs = XmmArgs.size(); i < NumXmmArgs; ++i) {
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| - Variable *Reg =
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| - legalizeToReg(XmmArgs[i], Traits::RegisterSet::Reg_xmm0 + i);
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| - // Generate a FakeUse of register arguments so that they do not get dead
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| - // code eliminated as a result of the FakeKill of scratch registers after
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| - // the call.
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| - Context.insert<InstFakeUse>(Reg);
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| - }
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| - // Generate the call instruction. Assign its result to a temporary with high
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| - // register allocation weight.
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| - // ReturnReg doubles as ReturnRegLo as necessary.
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| - Variable *ReturnReg = nullptr;
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| - Variable *ReturnRegHi = nullptr;
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| - if (Dest) {
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| - const Type DestTy = Dest->getType();
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| - switch (DestTy) {
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| - case IceType_NUM:
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| - case IceType_void:
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| - case IceType_i1:
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| - case IceType_i8:
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| - case IceType_i16:
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| - llvm::report_fatal_error("Invalid Call dest type");
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| - break;
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| - case IceType_i32:
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| - ReturnReg = makeReg(DestTy, Traits::RegisterSet::Reg_eax);
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| - break;
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| - case IceType_i64:
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| - ReturnReg = makeReg(IceType_i32, Traits::RegisterSet::Reg_eax);
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| - ReturnRegHi = makeReg(IceType_i32, Traits::RegisterSet::Reg_edx);
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| - break;
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| - case IceType_f32:
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| - case IceType_f64:
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| - // Leave ReturnReg==ReturnRegHi==nullptr, and capture the result with the
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| - // fstp instruction.
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| - break;
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| - case IceType_v4i1:
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| - case IceType_v8i1:
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| - case IceType_v16i1:
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| - case IceType_v16i8:
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| - case IceType_v8i16:
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| - case IceType_v4i32:
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| - case IceType_v4f32:
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| - ReturnReg = makeReg(DestTy, Traits::RegisterSet::Reg_xmm0);
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| - break;
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| - }
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| - }
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| -
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| - Operand *CallTarget =
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| - legalize(Instr->getCallTarget(), Legal_Reg | Legal_Imm | Legal_AddrAbs);
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| -
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| - Traits::Insts::Call *NewCall;
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| - /* AutoBundle scoping */ {
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| - std::unique_ptr<AutoBundle> Bundle;
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| - if (NeedSandboxing) {
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| - if (llvm::isa<Constant>(CallTarget)) {
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| - Bundle = makeUnique<AutoBundle>(this, InstBundleLock::Opt_AlignToEnd);
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| - } else {
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| - Variable *CallTargetVar = nullptr;
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| - _mov(CallTargetVar, CallTarget);
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| - Bundle = makeUnique<AutoBundle>(this, InstBundleLock::Opt_AlignToEnd);
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| - const SizeT BundleSize =
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| - 1 << Func->getAssembler<>()->getBundleAlignLog2Bytes();
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| - _and(CallTargetVar, Ctx->getConstantInt32(~(BundleSize - 1)));
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| - CallTarget = CallTargetVar;
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| - }
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| - }
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| - NewCall = Context.insert<Traits::Insts::Call>(ReturnReg, CallTarget);
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| - }
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| -
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| - if (ReturnRegHi)
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| - Context.insert<InstFakeDef>(ReturnRegHi);
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| -
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| - // Insert a register-kill pseudo instruction.
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| - Context.insert<InstFakeKill>(NewCall);
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| -
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| - if (Dest != nullptr && isScalarFloatingType(Dest->getType())) {
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| - // Special treatment for an FP function which returns its result in st(0).
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| - // If Dest ends up being a physical xmm register, the fstp emit code will
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| - // route st(0) through the space reserved in the function argument area
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| - // we allocated.
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| - _fstp(Dest);
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| - // Create a fake use of Dest in case it actually isn't used, because st(0)
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| - // still needs to be popped.
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| - Context.insert<InstFakeUse>(Dest);
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| - }
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| -
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| - // Generate a FakeUse to keep the call live if necessary.
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| - if (Instr->hasSideEffects() && ReturnReg) {
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| - Context.insert<InstFakeUse>(ReturnReg);
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| - }
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| -
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| - if (!Dest)
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| - return;
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| -
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| - // Assign the result of the call to Dest.
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| - if (ReturnReg) {
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| - if (ReturnRegHi) {
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| - auto *Dest64On32 = llvm::cast<Variable64On32>(Dest);
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| - Variable *DestLo = Dest64On32->getLo();
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| - Variable *DestHi = Dest64On32->getHi();
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| - _mov(DestLo, ReturnReg);
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| - _mov(DestHi, ReturnRegHi);
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| +Inst *TargetX8632::emitCallToTarget(Operand *CallTarget, Variable *ReturnReg) {
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| + std::unique_ptr<AutoBundle> Bundle;
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| + if (NeedSandboxing) {
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| + if (llvm::isa<Constant>(CallTarget)) {
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| + Bundle = makeUnique<AutoBundle>(this, InstBundleLock::Opt_AlignToEnd);
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| } else {
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| - const Type DestTy = Dest->getType();
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| - assert(DestTy == IceType_i32 || DestTy == IceType_i16 ||
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| - DestTy == IceType_i8 || DestTy == IceType_i1 ||
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| - isVectorType(DestTy));
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| - if (isVectorType(DestTy)) {
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| - _movp(Dest, ReturnReg);
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| - } else {
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| - _mov(Dest, ReturnReg);
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| - }
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| + Variable *CallTargetVar = nullptr;
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| + _mov(CallTargetVar, CallTarget);
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| + Bundle = makeUnique<AutoBundle>(this, InstBundleLock::Opt_AlignToEnd);
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| + const SizeT BundleSize =
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| + 1 << Func->getAssembler<>()->getBundleAlignLog2Bytes();
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| + _and(CallTargetVar, Ctx->getConstantInt32(~(BundleSize - 1)));
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| + CallTarget = CallTargetVar;
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| }
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| }
|
| + return Context.insert<Traits::Insts::Call>(ReturnReg, CallTarget);
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| }
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|
|
| -void TargetX8632::lowerArguments() {
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| - VarList &Args = Func->getArgs();
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| - // The first four arguments of vector type, regardless of their position
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| - // relative to the other arguments in the argument list, are passed in
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| - // registers xmm0 - xmm3.
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| - unsigned NumXmmArgs = 0;
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| -
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| - Context.init(Func->getEntryNode());
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| - Context.setInsertPoint(Context.getCur());
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| -
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| - for (SizeT I = 0, E = Args.size();
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| - I < E && NumXmmArgs < Traits::X86_MAX_XMM_ARGS; ++I) {
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| - Variable *Arg = Args[I];
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| - Type Ty = Arg->getType();
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| - if (!isVectorType(Ty))
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| - continue;
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| - // Replace Arg in the argument list with the home register. Then generate
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| - // an instruction in the prolog to copy the home register to the assigned
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| - // location of Arg.
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| - int32_t RegNum = Traits::RegisterSet::Reg_xmm0 + NumXmmArgs;
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| - ++NumXmmArgs;
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| - Variable *RegisterArg = Func->makeVariable(Ty);
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| - if (BuildDefs::dump())
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| - RegisterArg->setName(Func, "home_reg:" + Arg->getName(Func));
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| - RegisterArg->setRegNum(RegNum);
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| - RegisterArg->setIsArg();
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| - Arg->setIsArg(false);
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| -
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| - Args[I] = RegisterArg;
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| - Context.insert<InstAssign>(Arg, RegisterArg);
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| - }
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| -}
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| -
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| -void TargetX8632::lowerRet(const InstRet *Inst) {
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| - Variable *Reg = nullptr;
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| - if (Inst->hasRetValue()) {
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| - Operand *Src0 = legalize(Inst->getRetValue());
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| - const Type Src0Ty = Src0->getType();
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| - // TODO(jpp): this is not needed.
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| - if (Src0Ty == IceType_i64) {
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| +Variable *TargetX8632::moveReturnValueToRegister(Operand *Value,
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| + Type ReturnType) {
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| + if (isVectorType(ReturnType)) {
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| + return legalizeToReg(Value, Traits::RegisterSet::Reg_xmm0);
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| + } else if (isScalarFloatingType(ReturnType)) {
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| + _fld(Value);
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| + return nullptr;
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| + } else {
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| + assert(ReturnType == IceType_i32 || ReturnType == IceType_i64);
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| + if (ReturnType == IceType_i64) {
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| Variable *eax =
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| - legalizeToReg(loOperand(Src0), Traits::RegisterSet::Reg_eax);
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| + legalizeToReg(loOperand(Value), Traits::RegisterSet::Reg_eax);
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| Variable *edx =
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| - legalizeToReg(hiOperand(Src0), Traits::RegisterSet::Reg_edx);
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| - Reg = eax;
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| + legalizeToReg(hiOperand(Value), Traits::RegisterSet::Reg_edx);
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| Context.insert<InstFakeUse>(edx);
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| - } else if (isScalarFloatingType(Src0Ty)) {
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| - _fld(Src0);
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| - } else if (isVectorType(Src0Ty)) {
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| - Reg = legalizeToReg(Src0, Traits::RegisterSet::Reg_xmm0);
|
| + return eax;
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| } else {
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| - assert(Src0Ty == IceType_i32);
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| - _mov(Reg, Src0, Traits::RegisterSet::Reg_eax);
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| + Variable *Reg = nullptr;
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| + _mov(Reg, Value, Traits::RegisterSet::Reg_eax);
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| + return Reg;
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| }
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| }
|
| - // Add a ret instruction even if sandboxing is enabled, because addEpilog
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| - // explicitly looks for a ret instruction as a marker for where to insert the
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| - // frame removal instructions.
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| - _ret(Reg);
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| - // Add a fake use of esp to make sure esp stays alive for the entire
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| - // function. Otherwise post-call esp adjustments get dead-code eliminated.
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| - keepEspLiveAtExit();
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| }
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|
|
| void TargetX8632::addProlog(CfgNode *Node) {
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|
|