Merge lowerCall and lowerRet between x86 and x64

src/IceTargetLoweringX8632Traits.h

 //===- subzero/src/IceTargetLoweringX8632Traits.h - x86-32 traits -*- C++ -*-=//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 644 matching lines @@
   }
 
   static int32_t getRaxOrDie() {
     llvm::report_fatal_error("no rax in non-64-bit mode.");
   }
 
   static int32_t getRdxOrDie() {
     llvm::report_fatal_error("no rdx in non-64-bit mode.");
   }
 
+  // x86-32 calling convention:
+  //
+  // * The first four arguments of vector type, regardless of their position
+  // relative to the other arguments in the argument list, are placed in
+  // registers xmm0 - xmm3.
+  //
+  // This intends to match the section "IA-32 Function Calling Convention" of
+  // the document "OS X ABI Function Call Guide" by Apple.
+
   /// The maximum number of arguments to pass in XMM registers
   static const uint32_t X86_MAX_XMM_ARGS = 4;
   /// The maximum number of arguments to pass in GPR registers
   static const uint32_t X86_MAX_GPR_ARGS = 0;
+  /// Whether scalar floating point arguments are passed in XMM registers
+  static const bool X86_PASS_SCALAR_FP_IN_XMM = false;

[Jim Stichnoth, 2016/01/19 20:54:05]

Can this be constexpr?

[sehr, 2016/01/19 21:47:35]

Done.

+  /// Get the register for a given argument slot in the XMM registers.
+  static inline int32_t getRegisterForXmmArgNum(uint32_t ArgNum) {

[Jim Stichnoth, 2016/01/19 20:54:05]

Remove "inline" for consistency?

[sehr, 2016/01/19 21:47:35]

Done.

+    if (ArgNum >= X86_MAX_XMM_ARGS) {
+      return Variable::NoRegister;
+    }
+    return static_cast<int32_t>(RegisterSet::Reg_xmm0 + ArgNum);

[Jim Stichnoth, 2016/01/19 20:54:05]

This would break if we for some reason decided to list the xmm registers in a
different order, i.e. not starting from xmm0.

I would leave a static_assert that xmm0+1==xmm1, plus a TODO to deal with this
the same way it was done for ARM.

[sehr, 2016/01/19 21:47:35]

Done.

+  }
+  /// Get the register for a given argument slot in the GPRs.
+  static inline int32_t getRegisterForGprArgNum(Type Ty, uint32_t ArgNum) {
+    assert(Ty == IceType_i64 || Ty == IceType_i32);
+    (void)Ty;
+    (void)ArgNum;
+    return Variable::NoRegister;
+  }
+
   /// The number of bits in a byte
   static const uint32_t X86_CHAR_BIT = 8;
   /// Stack alignment. This is defined in IceTargetLoweringX8632.cpp because it
   /// is used as an argument to std::max(), and the default std::less<T> has an
   /// operator(T const&, T const&) which requires this member to have an
   /// address.
   static const uint32_t X86_STACK_ALIGNMENT_BYTES;
   /// Size of the return address on the stack
   static const uint32_t X86_RET_IP_SIZE_BYTES = 4;
   /// The number of different NOP instructions
@@ skipping 283 matching lines @@
 
   static uint8_t InstSegmentPrefixes[];
 };
 
 using Traits = ::Ice::X8632::TargetX8632Traits;
 } // end of namespace X8632
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632TRAITS_H