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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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2084 case SUB_D: | 2084 case SUB_D: |
2085 set_fpu_register_double(fd_reg, fs - ft); | 2085 set_fpu_register_double(fd_reg, fs - ft); |
2086 break; | 2086 break; |
2087 case MUL_D: | 2087 case MUL_D: |
2088 set_fpu_register_double(fd_reg, fs * ft); | 2088 set_fpu_register_double(fd_reg, fs * ft); |
2089 break; | 2089 break; |
2090 case DIV_D: | 2090 case DIV_D: |
2091 set_fpu_register_double(fd_reg, fs / ft); | 2091 set_fpu_register_double(fd_reg, fs / ft); |
2092 break; | 2092 break; |
2093 case ABS_D: | 2093 case ABS_D: |
2094 set_fpu_register_double(fd_reg, fs < 0 ? -fs : fs); | 2094 set_fpu_register_double(fd_reg, fabs(fs)); |
2095 break; | 2095 break; |
2096 case MOV_D: | 2096 case MOV_D: |
2097 set_fpu_register_double(fd_reg, fs); | 2097 set_fpu_register_double(fd_reg, fs); |
2098 break; | 2098 break; |
2099 case NEG_D: | 2099 case NEG_D: |
2100 set_fpu_register_double(fd_reg, -fs); | 2100 set_fpu_register_double(fd_reg, -fs); |
2101 break; | 2101 break; |
2102 case SQRT_D: | 2102 case SQRT_D: |
2103 set_fpu_register_double(fd_reg, sqrt(fs)); | 2103 set_fpu_register_double(fd_reg, sqrt(fs)); |
2104 break; | 2104 break; |
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2938 } | 2938 } |
2939 | 2939 |
2940 | 2940 |
2941 #undef UNSUPPORTED | 2941 #undef UNSUPPORTED |
2942 | 2942 |
2943 } } // namespace v8::internal | 2943 } } // namespace v8::internal |
2944 | 2944 |
2945 #endif // USE_SIMULATOR | 2945 #endif // USE_SIMULATOR |
2946 | 2946 |
2947 #endif // V8_TARGET_ARCH_MIPS | 2947 #endif // V8_TARGET_ARCH_MIPS |
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