Fixes buggy FPU tests for MIPS hardware.

runtime/vm/simulator_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include <math.h>  // for isnan.
 #include <setjmp.h>
 #include <stdlib.h>
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_MIPS)
@@ skipping 664 matching lines @@
   fregisters_[reg + 1] = Utils::High32Bits(value);
 }
 
 
 void Simulator::set_fregister_double(FRegister reg, double value) {
   const int64_t ival = bit_cast<int64_t, double>(value);
   set_fregister_long(reg, ival);
 }
 
 
+void Simulator::set_dregister(DRegister reg, int64_t value) {
+  ASSERT(reg >= 0);
+  ASSERT(reg < kNumberOfDRegisters);
+  FRegister lo = static_cast<FRegister>(reg * 2);
+  FRegister hi = static_cast<FRegister>((reg * 2) + 1);
+  set_fregister(lo, Utils::Low32Bits(value));
+  set_fregister(hi, Utils::High32Bits(value));
+}
+
+
+void Simulator::set_dregister_double(DRegister reg, double value) {
+  ASSERT(reg >= 0);
+  ASSERT(reg < kNumberOfDRegisters);
+  set_dregister(reg, bit_cast<int64_t, double>(value));
+}
+
+
 // Get the register from the architecture state.
 int32_t Simulator::get_register(Register reg) const {
   if (reg == R0) {
     return 0;
   }
   return registers_[reg];
 }
 
 
 int32_t Simulator::get_fregister(FRegister reg) const {
@@ skipping 22 matching lines @@
 
 double Simulator::get_fregister_double(FRegister reg) const {
   ASSERT(reg >= 0);
   ASSERT(reg < kNumberOfFRegisters);
   ASSERT((reg & 1) == 0);
   const int64_t value = get_fregister_long(reg);
   return bit_cast<double, int64_t>(value);
 }
 
 
+int64_t Simulator::get_dregister(DRegister reg) const {
+  ASSERT(reg >= 0);
+  ASSERT(reg < kNumberOfDRegisters);
+  FRegister lo = static_cast<FRegister>(reg * 2);
+  FRegister hi = static_cast<FRegister>((reg * 2) + 1);
+  return Utils::LowHighTo64Bits(get_fregister(lo), get_fregister(hi));
+}
+
+
+double Simulator::get_dregister_double(DRegister reg) const {
+  ASSERT(reg >= 0);
+  ASSERT(reg < kNumberOfDRegisters);
+  const int64_t value = get_dregister(reg);
+  return bit_cast<double, int64_t>(value);
+}
+
+
 void Simulator::UnimplementedInstruction(Instr* instr) {
   char buffer[64];
   snprintf(buffer, sizeof(buffer), "Unimplemented instruction: pc=%p\n", instr);
   SimulatorDebugger dbg(this);
   dbg.Stop(instr, buffer);
   FATAL("Cannot continue execution after unimplemented instruction.");
 }
 
 
 void Simulator::HandleIllegalAccess(uword addr, Instr* instr) {
@@ skipping 242 matching lines @@
 
       set_register(A0, icount_);
       set_register(A1, icount_);
       set_register(A2, icount_);
       set_register(A3, icount_);
       set_register(TMP, icount_);
       set_register(RA, icount_);
 
       // Zap floating point registers.
       int32_t zap_dvalue = icount_;
-      for (int i = F0; i <= F31; i++) {
+      for (int i = F0; i <= F18; i++) {
         set_fregister(static_cast<FRegister>(i), zap_dvalue);
       }
 
       // Return. Subtract to account for pc_ increment after return.
       set_pc(saved_ra - Instr::kInstrSize);
     } else {
       // Coming via long jump from a throw. Continue to exception handler.
       set_top_exit_frame_info(0);
       // Adjust for extra pc increment.
       set_pc(get_pc() - Instr::kInstrSize);
@@ skipping 30 matching lines @@
       DoBreak(instr);
       break;
     }
     case DIV: {
       ASSERT(instr->RdField() == 0);
       ASSERT(instr->SaField() == 0);
       // Format(instr, "div 'rs, 'rt");
       int32_t rs_val = get_register(instr->RsField());
       int32_t rt_val = get_register(instr->RtField());
       if (rt_val == 0) {
-        // Results are unpredictable.
-        set_hi_register(0);
-        set_lo_register(0);
-        // TODO(zra): Drop into the debugger here.
+        // Results are unpredictable, but there is no arithmetic exception.
+        set_hi_register(icount_);
+        set_lo_register(icount_);
         break;
       }
 
       if ((rs_val == static_cast<int32_t>(0x80000000)) &&
           (rt_val == static_cast<int32_t>(0xffffffff))) {
         set_lo_register(0x80000000);
         set_hi_register(0);
       } else {
         set_lo_register(rs_val / rt_val);
         set_hi_register(rs_val % rt_val);
       }
       break;
     }
     case DIVU: {
       ASSERT(instr->RdField() == 0);
       ASSERT(instr->SaField() == 0);
       // Format(instr, "divu 'rs, 'rt");
       uint32_t rs_val = get_register(instr->RsField());
       uint32_t rt_val = get_register(instr->RtField());
       if (rt_val == 0) {
-        // Results are unpredictable.
-        set_hi_register(0);
-        set_lo_register(0);
-        // TODO(zra): Drop into the debugger here.
+        // Results are unpredictable, but there is no arithmetic exception.
+        set_hi_register(icount_);
+        set_lo_register(icount_);
         break;
       }
       set_lo_register(rs_val / rt_val);
       set_hi_register(rs_val % rt_val);
       break;
     }
     case JALR: {
       ASSERT(instr->RtField() == R0);
       ASSERT(instr->RsField() != instr->RdField());
       ASSERT(!delay_slot_);
@@ skipping 856 matching lines @@
       }
     }
   }
 }
 
 
 int64_t Simulator::Call(int32_t entry,
                         int32_t parameter0,
                         int32_t parameter1,
                         int32_t parameter2,
-                        int32_t parameter3) {
+                        int32_t parameter3,
+                        bool fp_return) {
   // Save the SP register before the call so we can restore it.
   int32_t sp_before_call = get_register(SP);
 
   // Setup parameters.
   set_register(A0, parameter0);
   set_register(A1, parameter1);
   set_register(A2, parameter2);
   set_register(A3, parameter3);
 
   // Make sure the activation frames are properly aligned.
@@ skipping 16 matching lines @@
   // simulator code and therefore is regarded as a callee-saved register.
   int32_t r16_val = get_register(R16);
   int32_t r17_val = get_register(R17);
   int32_t r18_val = get_register(R18);
   int32_t r19_val = get_register(R19);
   int32_t r20_val = get_register(R20);
   int32_t r21_val = get_register(R21);
   int32_t r22_val = get_register(R22);
   int32_t r23_val = get_register(R23);
 
+  int64_t d10_val = get_dregister(D10);
+  int64_t d11_val = get_dregister(D11);
+  int64_t d12_val = get_dregister(D12);
+  int64_t d13_val = get_dregister(D13);
+  int64_t d14_val = get_dregister(D14);
+  int64_t d15_val = get_dregister(D15);
+
   // Setup the callee-saved registers with a known value. To be able to check
   // that they are preserved properly across dart execution.
   int32_t callee_saved_value = icount_;
   set_register(R16, callee_saved_value);
   set_register(R17, callee_saved_value);
   set_register(R18, callee_saved_value);
   set_register(R19, callee_saved_value);
   set_register(R20, callee_saved_value);
   set_register(R21, callee_saved_value);
   set_register(R22, callee_saved_value);
   set_register(R23, callee_saved_value);
 
+  set_dregister(D10, callee_saved_value);
+  set_dregister(D11, callee_saved_value);
+  set_dregister(D12, callee_saved_value);
+  set_dregister(D13, callee_saved_value);
+  set_dregister(D14, callee_saved_value);
+  set_dregister(D15, callee_saved_value);
+
   // Start the simulation
   Execute();
 
   // Check that the callee-saved registers have been preserved.
   ASSERT(callee_saved_value == get_register(R16));
   ASSERT(callee_saved_value == get_register(R17));
   ASSERT(callee_saved_value == get_register(R18));
   ASSERT(callee_saved_value == get_register(R19));
   ASSERT(callee_saved_value == get_register(R20));
   ASSERT(callee_saved_value == get_register(R21));
   ASSERT(callee_saved_value == get_register(R22));
   ASSERT(callee_saved_value == get_register(R23));
 
+  ASSERT(callee_saved_value == get_dregister(D10));
+  ASSERT(callee_saved_value == get_dregister(D11));
+  ASSERT(callee_saved_value == get_dregister(D12));
+  ASSERT(callee_saved_value == get_dregister(D13));
+  ASSERT(callee_saved_value == get_dregister(D14));
+  ASSERT(callee_saved_value == get_dregister(D15));
+
   // Restore callee-saved registers with the original value.
   set_register(R16, r16_val);
   set_register(R17, r17_val);
   set_register(R18, r18_val);
   set_register(R19, r19_val);
   set_register(R20, r20_val);
   set_register(R21, r21_val);
   set_register(R22, r22_val);
   set_register(R23, r23_val);
 
+  set_dregister(D10, d10_val);
+  set_dregister(D11, d11_val);
+  set_dregister(D12, d12_val);
+  set_dregister(D13, d13_val);
+  set_dregister(D14, d14_val);
+  set_dregister(D15, d15_val);
+
   // Restore the SP register and return V1:V0.
   set_register(SP, sp_before_call);
-  return Utils::LowHighTo64Bits(get_register(V0), get_register(V1));
+  int64_t return_value;
+  if (fp_return) {
+    return_value = Utils::LowHighTo64Bits(get_fregister(F0), get_fregister(F1));
+  } else {
+    return_value = Utils::LowHighTo64Bits(get_register(V0), get_register(V1));
+  }
+  return return_value;
 }
 
 
 void Simulator::Longjmp(uword pc,
                         uword sp,
                         uword fp,
                         RawObject* raw_exception,
                         RawObject* raw_stacktrace) {
   // Walk over all setjmp buffers (simulated --> C++ transitions)
   // and try to find the setjmp associated with the simulated stack pointer.
@@ skipping 23 matching lines @@
     set_register(kStackTraceObjectReg, bit_cast<int32_t>(raw_stacktrace));
   }
   buf->Longjmp();
 }
 
 }  // namespace dart
 
 #endif  // !defined(HOST_ARCH_MIPS)
 
 #endif  // defined TARGET_ARCH_MIPS