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Side by Side Diff: runtime/vm/constants_mips.h

Issue 15874005: Fixes buggy FPU tests for MIPS hardware. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 6 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #ifndef VM_CONSTANTS_MIPS_H_ 5 #ifndef VM_CONSTANTS_MIPS_H_
6 #define VM_CONSTANTS_MIPS_H_ 6 #define VM_CONSTANTS_MIPS_H_
7 7
8 #include "platform/assert.h" 8 #include "platform/assert.h"
9 9
10 namespace dart { 10 namespace dart {
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128 kNumberOfFRegisters = 32, 128 kNumberOfFRegisters = 32,
129 kNoFRegister = -1, 129 kNoFRegister = -1,
130 }; 130 };
131 131
132 // The double precision floating point registers are concatenated pairs of the 132 // The double precision floating point registers are concatenated pairs of the
133 // single precision registers, e.g. D0 is F1:F0, D1 is F3:F2, etc.. We only 133 // single precision registers, e.g. D0 is F1:F0, D1 is F3:F2, etc.. We only
134 // tell the architecture generic code about the double precision registers, then 134 // tell the architecture generic code about the double precision registers, then
135 // convert to the single precision registers when needed in the mips-specific 135 // convert to the single precision registers when needed in the mips-specific
136 // code. 136 // code.
137 enum DRegister { 137 enum DRegister {
138 D0 = 0, 138 D0 = 0, // Function return value 1.
139 D1 = 1, 139 D1 = 1, // Function return value 2.
140 D2 = 2, 140 D2 = 2, // Not preserved.
141 D3 = 3, 141 D3 = 3, // Not preserved.
142 D4 = 4, 142 D4 = 4, // Not preserved.
143 D5 = 5, 143 D5 = 5, // Not preserved.
144 D6 = 6, 144 D6 = 6, // Argument 1.
145 D7 = 7, 145 D7 = 7, // Argument 2.
146 D8 = 8, 146 D8 = 8, // Not preserved.
147 D9 = 9, 147 D9 = 9, // Not preserved.
148 D10 = 10, 148 D10 = 10, // Preserved.
149 D11 = 11, 149 D11 = 11, // Preserved.
150 D12 = 12, 150 D12 = 12, // Preserved.
151 D13 = 13, 151 D13 = 13, // Preserved.
152 D14 = 14, 152 D14 = 14, // Preserved.
153 D15 = 15, 153 D15 = 15, // Preserved.
154 D16 = 16,
155 kNumberOfDRegisters = 16, 154 kNumberOfDRegisters = 16,
156 kNoDRegister = -1, 155 kNoDRegister = -1,
157 }; 156 };
158 157
159 // Architecture independent aliases. 158 // Architecture independent aliases.
160 typedef DRegister FpuRegister; 159 typedef DRegister FpuRegister;
161 const FpuRegister FpuTMP = D0; 160 const FpuRegister FpuTMP = D0;
162 const int kNumberOfFpuRegisters = kNumberOfDRegisters; 161 const int kNumberOfFpuRegisters = kNumberOfDRegisters;
163 const FpuRegister kNoFpuRegister = kNoDRegister; 162 const FpuRegister kNoFpuRegister = kNoDRegister;
164 163
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593 #endif // defined(DEBUG) 592 #endif // defined(DEBUG)
594 593
595 private: 594 private:
596 DISALLOW_ALLOCATION(); 595 DISALLOW_ALLOCATION();
597 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr); 596 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr);
598 }; 597 };
599 598
600 } // namespace dart 599 } // namespace dart
601 600
602 #endif // VM_CONSTANTS_MIPS_H_ 601 #endif // VM_CONSTANTS_MIPS_H_
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