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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_ARM_MACRO_ASSEMBLER_ARM_H_ | 5 #ifndef V8_ARM_MACRO_ASSEMBLER_ARM_H_ |
6 #define V8_ARM_MACRO_ASSEMBLER_ARM_H_ | 6 #define V8_ARM_MACRO_ASSEMBLER_ARM_H_ |
7 | 7 |
8 #include "src/assembler.h" | 8 #include "src/assembler.h" |
9 #include "src/bailout-reason.h" | 9 #include "src/bailout-reason.h" |
10 #include "src/frames.h" | 10 #include "src/frames.h" |
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309 SmiCheck smi_check = INLINE_SMI_CHECK, | 309 SmiCheck smi_check = INLINE_SMI_CHECK, |
310 PointersToHereCheck pointers_to_here_check_for_value = | 310 PointersToHereCheck pointers_to_here_check_for_value = |
311 kPointersToHereMaybeInteresting); | 311 kPointersToHereMaybeInteresting); |
312 | 312 |
313 // Push a handle. | 313 // Push a handle. |
314 void Push(Handle<Object> handle); | 314 void Push(Handle<Object> handle); |
315 void Push(Smi* smi) { Push(Handle<Smi>(smi, isolate())); } | 315 void Push(Smi* smi) { Push(Handle<Smi>(smi, isolate())); } |
316 | 316 |
317 // Push two registers. Pushes leftmost register first (to highest address). | 317 // Push two registers. Pushes leftmost register first (to highest address). |
318 void Push(Register src1, Register src2, Condition cond = al) { | 318 void Push(Register src1, Register src2, Condition cond = al) { |
319 DCHECK(!src1.is(src2)); | |
320 if (src1.code() > src2.code()) { | 319 if (src1.code() > src2.code()) { |
321 stm(db_w, sp, src1.bit() | src2.bit(), cond); | 320 stm(db_w, sp, src1.bit() | src2.bit(), cond); |
322 } else { | 321 } else { |
323 str(src1, MemOperand(sp, 4, NegPreIndex), cond); | 322 str(src1, MemOperand(sp, 4, NegPreIndex), cond); |
324 str(src2, MemOperand(sp, 4, NegPreIndex), cond); | 323 str(src2, MemOperand(sp, 4, NegPreIndex), cond); |
325 } | 324 } |
326 } | 325 } |
327 | 326 |
328 // Push three registers. Pushes leftmost register first (to highest address). | 327 // Push three registers. Pushes leftmost register first (to highest address). |
329 void Push(Register src1, Register src2, Register src3, Condition cond = al) { | 328 void Push(Register src1, Register src2, Register src3, Condition cond = al) { |
330 DCHECK(!AreAliased(src1, src2, src3)); | |
331 if (src1.code() > src2.code()) { | 329 if (src1.code() > src2.code()) { |
332 if (src2.code() > src3.code()) { | 330 if (src2.code() > src3.code()) { |
333 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond); | 331 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond); |
334 } else { | 332 } else { |
335 stm(db_w, sp, src1.bit() | src2.bit(), cond); | 333 stm(db_w, sp, src1.bit() | src2.bit(), cond); |
336 str(src3, MemOperand(sp, 4, NegPreIndex), cond); | 334 str(src3, MemOperand(sp, 4, NegPreIndex), cond); |
337 } | 335 } |
338 } else { | 336 } else { |
339 str(src1, MemOperand(sp, 4, NegPreIndex), cond); | 337 str(src1, MemOperand(sp, 4, NegPreIndex), cond); |
340 Push(src2, src3, cond); | 338 Push(src2, src3, cond); |
341 } | 339 } |
342 } | 340 } |
343 | 341 |
344 // Push four registers. Pushes leftmost register first (to highest address). | 342 // Push four registers. Pushes leftmost register first (to highest address). |
345 void Push(Register src1, | 343 void Push(Register src1, |
346 Register src2, | 344 Register src2, |
347 Register src3, | 345 Register src3, |
348 Register src4, | 346 Register src4, |
349 Condition cond = al) { | 347 Condition cond = al) { |
350 DCHECK(!AreAliased(src1, src2, src3, src4)); | |
351 if (src1.code() > src2.code()) { | 348 if (src1.code() > src2.code()) { |
352 if (src2.code() > src3.code()) { | 349 if (src2.code() > src3.code()) { |
353 if (src3.code() > src4.code()) { | 350 if (src3.code() > src4.code()) { |
354 stm(db_w, | 351 stm(db_w, |
355 sp, | 352 sp, |
356 src1.bit() | src2.bit() | src3.bit() | src4.bit(), | 353 src1.bit() | src2.bit() | src3.bit() | src4.bit(), |
357 cond); | 354 cond); |
358 } else { | 355 } else { |
359 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond); | 356 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond); |
360 str(src4, MemOperand(sp, 4, NegPreIndex), cond); | 357 str(src4, MemOperand(sp, 4, NegPreIndex), cond); |
361 } | 358 } |
362 } else { | 359 } else { |
363 stm(db_w, sp, src1.bit() | src2.bit(), cond); | 360 stm(db_w, sp, src1.bit() | src2.bit(), cond); |
364 Push(src3, src4, cond); | 361 Push(src3, src4, cond); |
365 } | 362 } |
366 } else { | 363 } else { |
367 str(src1, MemOperand(sp, 4, NegPreIndex), cond); | 364 str(src1, MemOperand(sp, 4, NegPreIndex), cond); |
368 Push(src2, src3, src4, cond); | 365 Push(src2, src3, src4, cond); |
369 } | 366 } |
370 } | 367 } |
371 | 368 |
372 // Push five registers. Pushes leftmost register first (to highest address). | 369 // Push five registers. Pushes leftmost register first (to highest address). |
373 void Push(Register src1, Register src2, Register src3, Register src4, | 370 void Push(Register src1, Register src2, Register src3, Register src4, |
374 Register src5, Condition cond = al) { | 371 Register src5, Condition cond = al) { |
375 DCHECK(!AreAliased(src1, src2, src3, src4, src5)); | |
376 if (src1.code() > src2.code()) { | 372 if (src1.code() > src2.code()) { |
377 if (src2.code() > src3.code()) { | 373 if (src2.code() > src3.code()) { |
378 if (src3.code() > src4.code()) { | 374 if (src3.code() > src4.code()) { |
379 if (src4.code() > src5.code()) { | 375 if (src4.code() > src5.code()) { |
380 stm(db_w, sp, | 376 stm(db_w, sp, |
381 src1.bit() | src2.bit() | src3.bit() | src4.bit() | src5.bit(), | 377 src1.bit() | src2.bit() | src3.bit() | src4.bit() | src5.bit(), |
382 cond); | 378 cond); |
383 } else { | 379 } else { |
384 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit() | src4.bit(), | 380 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit() | src4.bit(), |
385 cond); | 381 cond); |
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1542 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> | 1538 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> |
1543 #else | 1539 #else |
1544 #define ACCESS_MASM(masm) masm-> | 1540 #define ACCESS_MASM(masm) masm-> |
1545 #endif | 1541 #endif |
1546 | 1542 |
1547 | 1543 |
1548 } // namespace internal | 1544 } // namespace internal |
1549 } // namespace v8 | 1545 } // namespace v8 |
1550 | 1546 |
1551 #endif // V8_ARM_MACRO_ASSEMBLER_ARM_H_ | 1547 #endif // V8_ARM_MACRO_ASSEMBLER_ARM_H_ |
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