[turbofan] Implement rounding of floats on x64 and ia32 without sse4.1.

src/x64/macro-assembler-x64.h

Index: src/x64/macro-assembler-x64.h
diff --git a/src/x64/macro-assembler-x64.h b/src/x64/macro-assembler-x64.h
index 83a5b9157e357259605cc810ff019a6a041eeb69..2b54b81a59871d5edf35e672546051f1d7ad4fb3 100644
--- a/src/x64/macro-assembler-x64.h
+++ b/src/x64/macro-assembler-x64.h
@@ -831,8 +831,12 @@ class MacroAssembler: public Assembler {
   void Cvttsd2si(Register dst, const Operand& src);
   void Cvttss2siq(Register dst, XMMRegister src);
   void Cvttss2siq(Register dst, const Operand& src);
+  void Cvtss2siq(Register dst, XMMRegister src);
+  void Cvtss2siq(Register dst, const Operand& src);
   void Cvttsd2siq(Register dst, XMMRegister src);
   void Cvttsd2siq(Register dst, const Operand& src);
+  void Cvtsd2siq(Register dst, XMMRegister src);
+  void Cvtsd2siq(Register dst, const Operand& src);
 
   // Move if the registers are not identical.
   void Move(Register target, Register source);
@@ -938,10 +942,13 @@ class MacroAssembler: public Assembler {
   AVX_OP2_XO(Mulsd, mulsd)
   AVX_OP2_XO(Divsd, divsd)
   AVX_OP2_X(Andpd, andpd)
+  AVX_OP2_X(Andps, andps)
   AVX_OP2_X(Orpd, orpd)
+  AVX_OP2_X(Orps, orps)
   AVX_OP2_X(Xorpd, xorpd)
   AVX_OP2_X(Pcmpeqd, pcmpeqd)
   AVX_OP2_WITH_TYPE(Psllq, psllq, byte)
+  AVX_OP2_WITH_TYPE(Pslld, pslld, byte)
   AVX_OP2_WITH_TYPE(Psrlq, psrlq, byte)
 
 #undef AVX_OP2_O
@@ -967,7 +974,11 @@ class MacroAssembler: public Assembler {
   void Movmskpd(Register dst, XMMRegister src);
 
   void Roundss(XMMRegister dst, XMMRegister src, RoundingMode mode);
+  void Roundss(XMMRegister dst, XMMRegister src, Register tmp, XMMRegister xtmp,
+               RoundingMode mode);
   void Roundsd(XMMRegister dst, XMMRegister src, RoundingMode mode);
+  void Roundsd(XMMRegister dst, XMMRegister src, Register tmp, XMMRegister xtmp,
+               RoundingMode mode);
   void Sqrtsd(XMMRegister dst, XMMRegister src);
   void Sqrtsd(XMMRegister dst, const Operand& src);