[turbofan] Implement rounding of floats on x64 and ia32 without sse4.1.

src/compiler/ia32/code-generator-ia32.cc

Index: src/compiler/ia32/code-generator-ia32.cc
diff --git a/src/compiler/ia32/code-generator-ia32.cc b/src/compiler/ia32/code-generator-ia32.cc
index b52146b4d24a2c08d970a56951df08947d123ff4..68948f6b605fef1d76c0cf55a52012d6704fa801 100644
--- a/src/compiler/ia32/code-generator-ia32.cc
+++ b/src/compiler/ia32/code-generator-ia32.cc
@@ -654,10 +654,16 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
       break;
     }
     case kSSEFloat32Round: {
-      CpuFeatureScope sse_scope(masm(), SSE4_1);
       RoundingMode const mode =
           static_cast<RoundingMode>(MiscField::decode(instr->opcode()));
+      if (CpuFeatures::IsSupported(SSE4_1)) {
+        CpuFeatureScope sse_scope(masm(), SSE4_1);
       __ roundss(i.OutputDoubleRegister(), i.InputDoubleRegister(0), mode);
+      } else {
+        Register scratch = i.TempRegister(0);
+        __ Roundss(i.OutputDoubleRegister(), i.InputDoubleRegister(0), scratch,
+                   kScratchDoubleReg, mode);
+      }
       break;
     }
     case kSSEFloat64Cmp:
@@ -727,10 +733,16 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
       __ sqrtsd(i.OutputDoubleRegister(), i.InputOperand(0));
       break;
     case kSSEFloat64Round: {
-      CpuFeatureScope sse_scope(masm(), SSE4_1);
       RoundingMode const mode =
           static_cast<RoundingMode>(MiscField::decode(instr->opcode()));
-      __ roundsd(i.OutputDoubleRegister(), i.InputDoubleRegister(0), mode);
+      if (CpuFeatures::IsSupported(SSE4_1)) {
+        CpuFeatureScope sse_scope(masm(), SSE4_1);
+        __ roundsd(i.OutputDoubleRegister(), i.InputDoubleRegister(0), mode);
+      } else {
+        Register scratch = i.TempRegister(0);
+        __ Roundsd(i.OutputDoubleRegister(), i.InputDoubleRegister(0), scratch,
+                   kScratchDoubleReg, mode);
+      }
       break;
     }
     case kSSEFloat32ToFloat64: