[turbofan] Implement rounding of floats on x64 and ia32 without sse4.1.

src/x64/macro-assembler-x64.cc

Index: src/x64/macro-assembler-x64.cc
diff --git a/src/x64/macro-assembler-x64.cc b/src/x64/macro-assembler-x64.cc
index 179ed66b0d81b9763a5778347ce25e57826c0f11..3b15d8bfa24553db87841144b10b1e26c179f85d 100644
--- a/src/x64/macro-assembler-x64.cc
+++ b/src/x64/macro-assembler-x64.cc
@@ -958,6 +958,46 @@ void MacroAssembler::Cvttss2siq(Register dst, const Operand& src) {
 }
 
 
+void MacroAssembler::Cvtss2siq(Register dst, XMMRegister src) {
+  if (CpuFeatures::IsSupported(AVX)) {
+    CpuFeatureScope scope(this, AVX);
+    vcvtss2siq(dst, src);
+  } else {
+    cvtss2siq(dst, src);
+  }
+}
+
+
+void MacroAssembler::Cvtss2siq(Register dst, const Operand& src) {
+  if (CpuFeatures::IsSupported(AVX)) {
+    CpuFeatureScope scope(this, AVX);
+    vcvtss2siq(dst, src);
+  } else {
+    cvtss2siq(dst, src);
+  }
+}
+
+
+void MacroAssembler::Cvtsd2siq(Register dst, XMMRegister src) {
+  if (CpuFeatures::IsSupported(AVX)) {
+    CpuFeatureScope scope(this, AVX);
+    vcvtsd2siq(dst, src);
+  } else {
+    cvtsd2siq(dst, src);
+  }
+}
+
+
+void MacroAssembler::Cvtsd2siq(Register dst, const Operand& src) {
+  if (CpuFeatures::IsSupported(AVX)) {
+    CpuFeatureScope scope(this, AVX);
+    vcvtsd2siq(dst, src);
+  } else {
+    cvtsd2siq(dst, src);
+  }
+}
+
+
 void MacroAssembler::Cvttsd2siq(Register dst, XMMRegister src) {
   if (CpuFeatures::IsSupported(AVX)) {
     CpuFeatureScope scope(this, AVX);