OLD | NEW |
1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #if V8_TARGET_ARCH_X64 | 5 #if V8_TARGET_ARCH_X64 |
6 | 6 |
7 #include "src/base/bits.h" | 7 #include "src/base/bits.h" |
8 #include "src/base/division-by-constant.h" | 8 #include "src/base/division-by-constant.h" |
9 #include "src/bootstrapper.h" | 9 #include "src/bootstrapper.h" |
10 #include "src/codegen.h" | 10 #include "src/codegen.h" |
(...skipping 984 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
995 void MacroAssembler::Cvttss2siq(Register dst, const Operand& src) { | 995 void MacroAssembler::Cvttss2siq(Register dst, const Operand& src) { |
996 if (CpuFeatures::IsSupported(AVX)) { | 996 if (CpuFeatures::IsSupported(AVX)) { |
997 CpuFeatureScope scope(this, AVX); | 997 CpuFeatureScope scope(this, AVX); |
998 vcvttss2siq(dst, src); | 998 vcvttss2siq(dst, src); |
999 } else { | 999 } else { |
1000 cvttss2siq(dst, src); | 1000 cvttss2siq(dst, src); |
1001 } | 1001 } |
1002 } | 1002 } |
1003 | 1003 |
1004 | 1004 |
| 1005 void MacroAssembler::Cvtss2siq(Register dst, XMMRegister src) { |
| 1006 if (CpuFeatures::IsSupported(AVX)) { |
| 1007 CpuFeatureScope scope(this, AVX); |
| 1008 vcvtss2siq(dst, src); |
| 1009 } else { |
| 1010 cvtss2siq(dst, src); |
| 1011 } |
| 1012 } |
| 1013 |
| 1014 |
| 1015 void MacroAssembler::Cvtss2siq(Register dst, const Operand& src) { |
| 1016 if (CpuFeatures::IsSupported(AVX)) { |
| 1017 CpuFeatureScope scope(this, AVX); |
| 1018 vcvtss2siq(dst, src); |
| 1019 } else { |
| 1020 cvtss2siq(dst, src); |
| 1021 } |
| 1022 } |
| 1023 |
| 1024 |
| 1025 void MacroAssembler::Cvtsd2siq(Register dst, XMMRegister src) { |
| 1026 if (CpuFeatures::IsSupported(AVX)) { |
| 1027 CpuFeatureScope scope(this, AVX); |
| 1028 vcvtsd2siq(dst, src); |
| 1029 } else { |
| 1030 cvtsd2siq(dst, src); |
| 1031 } |
| 1032 } |
| 1033 |
| 1034 |
| 1035 void MacroAssembler::Cvtsd2siq(Register dst, const Operand& src) { |
| 1036 if (CpuFeatures::IsSupported(AVX)) { |
| 1037 CpuFeatureScope scope(this, AVX); |
| 1038 vcvtsd2siq(dst, src); |
| 1039 } else { |
| 1040 cvtsd2siq(dst, src); |
| 1041 } |
| 1042 } |
| 1043 |
| 1044 |
1005 void MacroAssembler::Cvttsd2siq(Register dst, XMMRegister src) { | 1045 void MacroAssembler::Cvttsd2siq(Register dst, XMMRegister src) { |
1006 if (CpuFeatures::IsSupported(AVX)) { | 1046 if (CpuFeatures::IsSupported(AVX)) { |
1007 CpuFeatureScope scope(this, AVX); | 1047 CpuFeatureScope scope(this, AVX); |
1008 vcvttsd2siq(dst, src); | 1048 vcvttsd2siq(dst, src); |
1009 } else { | 1049 } else { |
1010 cvttsd2siq(dst, src); | 1050 cvttsd2siq(dst, src); |
1011 } | 1051 } |
1012 } | 1052 } |
1013 | 1053 |
1014 | 1054 |
(...skipping 1794 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
2809 RoundingMode mode) { | 2849 RoundingMode mode) { |
2810 if (CpuFeatures::IsSupported(AVX)) { | 2850 if (CpuFeatures::IsSupported(AVX)) { |
2811 CpuFeatureScope scope(this, AVX); | 2851 CpuFeatureScope scope(this, AVX); |
2812 vroundss(dst, dst, src, mode); | 2852 vroundss(dst, dst, src, mode); |
2813 } else { | 2853 } else { |
2814 roundss(dst, src, mode); | 2854 roundss(dst, src, mode); |
2815 } | 2855 } |
2816 } | 2856 } |
2817 | 2857 |
2818 | 2858 |
| 2859 void MacroAssembler::Roundss(XMMRegister dst, XMMRegister src, Register tmp, |
| 2860 XMMRegister xtmp, RoundingMode mode) { |
| 2861 if (CpuFeatures::IsSupported(SSE4_1)) { |
| 2862 CpuFeatureScope scope(this, SSE4_1); |
| 2863 Roundss(dst, src, mode); |
| 2864 } else { |
| 2865 { |
| 2866 // Set the right rounding mode. |
| 2867 subq(rsp, Immediate(kPointerSize * 2)); |
| 2868 stmxcsr(Operand(rsp, 0)); |
| 2869 movl(tmp, Operand(rsp, 0)); |
| 2870 andl(tmp, Immediate(0xffff9fff)); |
| 2871 orl(tmp, Immediate(mode << 13)); |
| 2872 movl(Operand(rsp, kPointerSize), tmp); |
| 2873 ldmxcsr(Operand(rsp, kPointerSize)); |
| 2874 } |
| 2875 |
| 2876 // Do rounding by conversion to int64. |
| 2877 Cvtss2siq(tmp, src); |
| 2878 |
| 2879 Label done; |
| 2880 Label out_of_range; |
| 2881 cmpq(tmp, Immediate(1)); |
| 2882 // If the conversion results in INT64_MIN, then the input is outside |
| 2883 // int64 range, and due to the limited precision of float32 this means |
| 2884 // that the input must have been an integer already. We are therefore |
| 2885 // done already. |
| 2886 j(overflow, &out_of_range); |
| 2887 |
| 2888 // Saving the sign bit. |
| 2889 Pcmpeqd(xtmp, xtmp); |
| 2890 Pslld(xtmp, 31); |
| 2891 Andps(xtmp, src); |
| 2892 // Rounding is done by converting the value back to float. |
| 2893 Cvtqsi2ss(dst, tmp); |
| 2894 // Restore the sign bit. |
| 2895 Orps(dst, xtmp); |
| 2896 if (!dst.is(src)) { |
| 2897 jmp(&done); |
| 2898 } |
| 2899 |
| 2900 bind(&out_of_range); |
| 2901 if (!dst.is(src)) { |
| 2902 movss(dst, src); |
| 2903 } |
| 2904 |
| 2905 bind(&done); |
| 2906 // Restore the original rounding mode. |
| 2907 ldmxcsr(Operand(rsp, 0)); |
| 2908 addq(rsp, Immediate(kPointerSize * 2)); |
| 2909 } |
| 2910 } |
| 2911 |
| 2912 |
2819 void MacroAssembler::Roundsd(XMMRegister dst, XMMRegister src, | 2913 void MacroAssembler::Roundsd(XMMRegister dst, XMMRegister src, |
2820 RoundingMode mode) { | 2914 RoundingMode mode) { |
2821 if (CpuFeatures::IsSupported(AVX)) { | 2915 if (CpuFeatures::IsSupported(AVX)) { |
2822 CpuFeatureScope scope(this, AVX); | 2916 CpuFeatureScope scope(this, AVX); |
2823 vroundsd(dst, dst, src, mode); | 2917 vroundsd(dst, dst, src, mode); |
2824 } else { | 2918 } else { |
2825 roundsd(dst, src, mode); | 2919 roundsd(dst, src, mode); |
2826 } | 2920 } |
2827 } | 2921 } |
2828 | 2922 |
2829 | 2923 |
| 2924 void MacroAssembler::Roundsd(XMMRegister dst, XMMRegister src, Register tmp, |
| 2925 XMMRegister xtmp, RoundingMode mode) { |
| 2926 if (CpuFeatures::IsSupported(SSE4_1)) { |
| 2927 CpuFeatureScope scope(this, SSE4_1); |
| 2928 Roundsd(dst, src, mode); |
| 2929 } else { |
| 2930 { |
| 2931 // Set the right rounding mode. |
| 2932 subq(rsp, Immediate(kPointerSize * 2)); |
| 2933 stmxcsr(Operand(rsp, 0)); |
| 2934 movl(tmp, Operand(rsp, 0)); |
| 2935 andl(tmp, Immediate(0xffff9fff)); |
| 2936 orl(tmp, Immediate(mode << 13)); |
| 2937 movl(Operand(rsp, kPointerSize), tmp); |
| 2938 ldmxcsr(Operand(rsp, kPointerSize)); |
| 2939 } |
| 2940 // Do rounding by conversion to int64. |
| 2941 Cvtsd2siq(tmp, src); |
| 2942 |
| 2943 Label out_of_range; |
| 2944 Label done; |
| 2945 cmpq(tmp, Immediate(1)); |
| 2946 // If the conversion results in INT64_MIN, then the input is outside |
| 2947 // int64 range, and due to the limited precision of float64 this means |
| 2948 // that the input must have been an integer already. We are therefore |
| 2949 // done already. |
| 2950 j(overflow, &out_of_range); |
| 2951 // Saving the sign bit. |
| 2952 // Initialize xtmp with 0x8000000000000000. |
| 2953 Pcmpeqd(xtmp, xtmp); |
| 2954 Psllq(xtmp, 63); |
| 2955 Andpd(xtmp, src); |
| 2956 // Rounding is done by converting the value back to float. |
| 2957 Cvtqsi2sd(dst, tmp); |
| 2958 // Restore the sign bit. |
| 2959 Orpd(dst, xtmp); |
| 2960 |
| 2961 if (!dst.is(src)) { |
| 2962 jmp(&done); |
| 2963 } |
| 2964 |
| 2965 bind(&out_of_range); |
| 2966 if (!dst.is(src)) { |
| 2967 movsd(dst, src); |
| 2968 } |
| 2969 |
| 2970 bind(&done); |
| 2971 // Restore the original rounding mode. |
| 2972 ldmxcsr(Operand(rsp, 0)); |
| 2973 addq(rsp, Immediate(kPointerSize * 2)); |
| 2974 } |
| 2975 } |
| 2976 |
| 2977 |
2830 void MacroAssembler::Sqrtsd(XMMRegister dst, XMMRegister src) { | 2978 void MacroAssembler::Sqrtsd(XMMRegister dst, XMMRegister src) { |
2831 if (CpuFeatures::IsSupported(AVX)) { | 2979 if (CpuFeatures::IsSupported(AVX)) { |
2832 CpuFeatureScope scope(this, AVX); | 2980 CpuFeatureScope scope(this, AVX); |
2833 vsqrtsd(dst, dst, src); | 2981 vsqrtsd(dst, dst, src); |
2834 } else { | 2982 } else { |
2835 sqrtsd(dst, src); | 2983 sqrtsd(dst, src); |
2836 } | 2984 } |
2837 } | 2985 } |
2838 | 2986 |
2839 | 2987 |
(...skipping 2682 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
5522 movl(rax, dividend); | 5670 movl(rax, dividend); |
5523 shrl(rax, Immediate(31)); | 5671 shrl(rax, Immediate(31)); |
5524 addl(rdx, rax); | 5672 addl(rdx, rax); |
5525 } | 5673 } |
5526 | 5674 |
5527 | 5675 |
5528 } // namespace internal | 5676 } // namespace internal |
5529 } // namespace v8 | 5677 } // namespace v8 |
5530 | 5678 |
5531 #endif // V8_TARGET_ARCH_X64 | 5679 #endif // V8_TARGET_ARCH_X64 |
OLD | NEW |