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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <assert.h> | 5 #include <assert.h> |
6 #include <stdarg.h> | 6 #include <stdarg.h> |
7 #include <stdio.h> | 7 #include <stdio.h> |
8 | 8 |
9 #if V8_TARGET_ARCH_X64 | 9 #if V8_TARGET_ARCH_X64 |
10 | 10 |
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987 case 0x2a: | 987 case 0x2a: |
988 AppendToBuffer("%s %s,%s,", vex_w() ? "vcvtqsi2ss" : "vcvtlsi2ss", | 988 AppendToBuffer("%s %s,%s,", vex_w() ? "vcvtqsi2ss" : "vcvtlsi2ss", |
989 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); | 989 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); |
990 current += PrintRightOperand(current); | 990 current += PrintRightOperand(current); |
991 break; | 991 break; |
992 case 0x2c: | 992 case 0x2c: |
993 AppendToBuffer("vcvttss2si%s %s,", vex_w() ? "q" : "", | 993 AppendToBuffer("vcvttss2si%s %s,", vex_w() ? "q" : "", |
994 NameOfCPURegister(regop)); | 994 NameOfCPURegister(regop)); |
995 current += PrintRightXMMOperand(current); | 995 current += PrintRightXMMOperand(current); |
996 break; | 996 break; |
| 997 case 0x2d: |
| 998 AppendToBuffer("vcvtss2si%s %s,", vex_w() ? "q" : "", |
| 999 NameOfCPURegister(regop)); |
| 1000 current += PrintRightXMMOperand(current); |
| 1001 break; |
997 case 0x58: | 1002 case 0x58: |
998 AppendToBuffer("vaddss %s,%s,", NameOfXMMRegister(regop), | 1003 AppendToBuffer("vaddss %s,%s,", NameOfXMMRegister(regop), |
999 NameOfXMMRegister(vvvv)); | 1004 NameOfXMMRegister(vvvv)); |
1000 current += PrintRightXMMOperand(current); | 1005 current += PrintRightXMMOperand(current); |
1001 break; | 1006 break; |
1002 case 0x59: | 1007 case 0x59: |
1003 AppendToBuffer("vmulss %s,%s,", NameOfXMMRegister(regop), | 1008 AppendToBuffer("vmulss %s,%s,", NameOfXMMRegister(regop), |
1004 NameOfXMMRegister(vvvv)); | 1009 NameOfXMMRegister(vvvv)); |
1005 current += PrintRightXMMOperand(current); | 1010 current += PrintRightXMMOperand(current); |
1006 break; | 1011 break; |
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1232 break; | 1237 break; |
1233 case 0x2e: | 1238 case 0x2e: |
1234 AppendToBuffer("vucomiss %s,", NameOfXMMRegister(regop)); | 1239 AppendToBuffer("vucomiss %s,", NameOfXMMRegister(regop)); |
1235 current += PrintRightXMMOperand(current); | 1240 current += PrintRightXMMOperand(current); |
1236 break; | 1241 break; |
1237 case 0x54: | 1242 case 0x54: |
1238 AppendToBuffer("vandps %s,%s,", NameOfXMMRegister(regop), | 1243 AppendToBuffer("vandps %s,%s,", NameOfXMMRegister(regop), |
1239 NameOfXMMRegister(vvvv)); | 1244 NameOfXMMRegister(vvvv)); |
1240 current += PrintRightXMMOperand(current); | 1245 current += PrintRightXMMOperand(current); |
1241 break; | 1246 break; |
| 1247 case 0x56: |
| 1248 AppendToBuffer("vorps %s,%s,", NameOfXMMRegister(regop), |
| 1249 NameOfXMMRegister(vvvv)); |
| 1250 current += PrintRightXMMOperand(current); |
| 1251 break; |
1242 case 0x57: | 1252 case 0x57: |
1243 AppendToBuffer("vxorps %s,%s,", NameOfXMMRegister(regop), | 1253 AppendToBuffer("vxorps %s,%s,", NameOfXMMRegister(regop), |
1244 NameOfXMMRegister(vvvv)); | 1254 NameOfXMMRegister(vvvv)); |
1245 current += PrintRightXMMOperand(current); | 1255 current += PrintRightXMMOperand(current); |
1246 break; | 1256 break; |
1247 default: | 1257 default: |
1248 UnimplementedInstruction(); | 1258 UnimplementedInstruction(); |
1249 } | 1259 } |
1250 } else if (vex_66() && vex_0f()) { | 1260 } else if (vex_66() && vex_0f()) { |
1251 int mod, regop, rm, vvvv = vex_vreg(); | 1261 int mod, regop, rm, vvvv = vex_vreg(); |
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1281 case 0x57: | 1291 case 0x57: |
1282 AppendToBuffer("vxorpd %s,%s,", NameOfXMMRegister(regop), | 1292 AppendToBuffer("vxorpd %s,%s,", NameOfXMMRegister(regop), |
1283 NameOfXMMRegister(vvvv)); | 1293 NameOfXMMRegister(vvvv)); |
1284 current += PrintRightXMMOperand(current); | 1294 current += PrintRightXMMOperand(current); |
1285 break; | 1295 break; |
1286 case 0x6e: | 1296 case 0x6e: |
1287 AppendToBuffer("vmov%c %s,", vex_w() ? 'q' : 'd', | 1297 AppendToBuffer("vmov%c %s,", vex_w() ? 'q' : 'd', |
1288 NameOfXMMRegister(regop)); | 1298 NameOfXMMRegister(regop)); |
1289 current += PrintRightOperand(current); | 1299 current += PrintRightOperand(current); |
1290 break; | 1300 break; |
| 1301 case 0x72: |
| 1302 AppendToBuffer("%s %s,", regop == 6 ? "vpslld" : "vpsrld", |
| 1303 NameOfXMMRegister(vvvv)); |
| 1304 current += PrintRightXMMOperand(current); |
| 1305 AppendToBuffer(",%u", *current++); |
| 1306 break; |
1291 case 0x73: | 1307 case 0x73: |
1292 AppendToBuffer("%s %s,", regop == 6 ? "vpsllq" : "vpsrlq", | 1308 AppendToBuffer("%s %s,", regop == 6 ? "vpsllq" : "vpsrlq", |
1293 NameOfXMMRegister(vvvv)); | 1309 NameOfXMMRegister(vvvv)); |
1294 current += PrintRightXMMOperand(current); | 1310 current += PrintRightXMMOperand(current); |
1295 AppendToBuffer(",%u", *current++); | 1311 AppendToBuffer(",%u", *current++); |
1296 break; | 1312 break; |
1297 case 0x76: | 1313 case 0x76: |
1298 AppendToBuffer("vpcmpeqd %s,%s,", NameOfXMMRegister(regop), | 1314 AppendToBuffer("vpcmpeqd %s,%s,", NameOfXMMRegister(regop), |
1299 NameOfXMMRegister(vvvv)); | 1315 NameOfXMMRegister(vvvv)); |
1300 current += PrintRightXMMOperand(current); | 1316 current += PrintRightXMMOperand(current); |
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1704 AppendToBuffer("%s %s,", mnemonic, NameOfXMMRegister(regop)); | 1720 AppendToBuffer("%s %s,", mnemonic, NameOfXMMRegister(regop)); |
1705 current += PrintRightOperand(current); | 1721 current += PrintRightOperand(current); |
1706 } else if (opcode == 0x2C) { | 1722 } else if (opcode == 0x2C) { |
1707 // CVTTSS2SI: | 1723 // CVTTSS2SI: |
1708 // Convert with truncation scalar single-precision FP to dword integer. | 1724 // Convert with truncation scalar single-precision FP to dword integer. |
1709 int mod, regop, rm; | 1725 int mod, regop, rm; |
1710 get_modrm(*current, &mod, ®op, &rm); | 1726 get_modrm(*current, &mod, ®op, &rm); |
1711 AppendToBuffer("cvttss2si%c %s,", | 1727 AppendToBuffer("cvttss2si%c %s,", |
1712 operand_size_code(), NameOfCPURegister(regop)); | 1728 operand_size_code(), NameOfCPURegister(regop)); |
1713 current += PrintRightXMMOperand(current); | 1729 current += PrintRightXMMOperand(current); |
| 1730 } else if (opcode == 0x2D) { |
| 1731 // CVTSS2SI: |
| 1732 // Convert with rounded scalar single-precision FP to dword integer. |
| 1733 int mod, regop, rm; |
| 1734 get_modrm(*current, &mod, ®op, &rm); |
| 1735 AppendToBuffer("cvtss2si%c %s,", operand_size_code(), |
| 1736 NameOfCPURegister(regop)); |
| 1737 current += PrintRightXMMOperand(current); |
1714 } else if (opcode == 0x7E) { | 1738 } else if (opcode == 0x7E) { |
1715 int mod, regop, rm; | 1739 int mod, regop, rm; |
1716 get_modrm(*current, &mod, ®op, &rm); | 1740 get_modrm(*current, &mod, ®op, &rm); |
1717 AppendToBuffer("movq %s,", NameOfXMMRegister(regop)); | 1741 AppendToBuffer("movq %s,", NameOfXMMRegister(regop)); |
1718 current += PrintRightXMMOperand(current); | 1742 current += PrintRightXMMOperand(current); |
1719 } else if ((opcode & 0xF8) == 0x58 || opcode == 0x51) { | 1743 } else if ((opcode & 0xF8) == 0x58 || opcode == 0x51) { |
1720 // XMM arithmetic. Mnemonic was retrieved at the start of this function. | 1744 // XMM arithmetic. Mnemonic was retrieved at the start of this function. |
1721 int mod, regop, rm; | 1745 int mod, regop, rm; |
1722 get_modrm(*current, &mod, ®op, &rm); | 1746 get_modrm(*current, &mod, ®op, &rm); |
1723 AppendToBuffer("%s %s,", mnemonic, NameOfXMMRegister(regop)); | 1747 AppendToBuffer("%s %s,", mnemonic, NameOfXMMRegister(regop)); |
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1864 } | 1888 } |
1865 } else if (opcode == 0xB8 || opcode == 0xBC || opcode == 0xBD) { | 1889 } else if (opcode == 0xB8 || opcode == 0xBC || opcode == 0xBD) { |
1866 // POPCNT, CTZ, CLZ. | 1890 // POPCNT, CTZ, CLZ. |
1867 AppendToBuffer("%s%c ", mnemonic, operand_size_code()); | 1891 AppendToBuffer("%s%c ", mnemonic, operand_size_code()); |
1868 int mod, regop, rm; | 1892 int mod, regop, rm; |
1869 get_modrm(*current, &mod, ®op, &rm); | 1893 get_modrm(*current, &mod, ®op, &rm); |
1870 AppendToBuffer("%s,", NameOfCPURegister(regop)); | 1894 AppendToBuffer("%s,", NameOfCPURegister(regop)); |
1871 current += PrintRightOperand(current); | 1895 current += PrintRightOperand(current); |
1872 } else if (opcode == 0x0B) { | 1896 } else if (opcode == 0x0B) { |
1873 AppendToBuffer("ud2"); | 1897 AppendToBuffer("ud2"); |
| 1898 } else if (opcode == 0xAE) { |
| 1899 byte modrm = *(data + 2); |
| 1900 int mod, regop, rm; |
| 1901 get_modrm(modrm, &mod, ®op, &rm); |
| 1902 regop &= 0x7; // The REX.R bit does not affect the operation. |
| 1903 const char* mnem = NULL; |
| 1904 switch (regop) { |
| 1905 case 2: |
| 1906 mnem = "ldmxcsr"; |
| 1907 break; |
| 1908 case 3: |
| 1909 mnem = "stmxcsr"; |
| 1910 break; |
| 1911 default: |
| 1912 UnimplementedInstruction(); |
| 1913 return 2; |
| 1914 } |
| 1915 DCHECK_NOT_NULL(mnem); |
| 1916 AppendToBuffer("%s ", mnem); |
| 1917 current += |
| 1918 PrintRightOperandHelper(current, &DisassemblerX64::NameOfCPURegister); |
1874 } else { | 1919 } else { |
1875 UnimplementedInstruction(); | 1920 UnimplementedInstruction(); |
1876 } | 1921 } |
1877 return static_cast<int>(current - data); | 1922 return static_cast<int>(current - data); |
1878 } | 1923 } |
1879 | 1924 |
1880 | 1925 |
1881 // Mnemonics for two-byte opcode instructions starting with 0x0F. | 1926 // Mnemonics for two-byte opcode instructions starting with 0x0F. |
1882 // The argument is the second byte of the two-byte opcode. | 1927 // The argument is the second byte of the two-byte opcode. |
1883 // Returns NULL if the instruction is not handled here. | 1928 // Returns NULL if the instruction is not handled here. |
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2490 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) { | 2535 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) { |
2491 fprintf(f, " "); | 2536 fprintf(f, " "); |
2492 } | 2537 } |
2493 fprintf(f, " %s\n", buffer.start()); | 2538 fprintf(f, " %s\n", buffer.start()); |
2494 } | 2539 } |
2495 } | 2540 } |
2496 | 2541 |
2497 } // namespace disasm | 2542 } // namespace disasm |
2498 | 2543 |
2499 #endif // V8_TARGET_ARCH_X64 | 2544 #endif // V8_TARGET_ARCH_X64 |
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