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Issue 1584663007: [turbofan] Implement rounding of floats on x64 and ia32 without sse4.1. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: reduced generated code. Created 4 years, 11 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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1975 1975
1976 void Assembler::cvttss2si(Register dst, const Operand& src) { 1976 void Assembler::cvttss2si(Register dst, const Operand& src) {
1977 EnsureSpace ensure_space(this); 1977 EnsureSpace ensure_space(this);
1978 EMIT(0xF3); 1978 EMIT(0xF3);
1979 EMIT(0x0F); 1979 EMIT(0x0F);
1980 EMIT(0x2C); 1980 EMIT(0x2C);
1981 emit_operand(dst, src); 1981 emit_operand(dst, src);
1982 } 1982 }
1983 1983
1984 1984
1985 void Assembler::cvtss2si(Register dst, const Operand& src) {
1986 EnsureSpace ensure_space(this);
1987 EMIT(0xF3);
1988 EMIT(0x0F);
1989 EMIT(0x2D);
1990 emit_operand(dst, src);
1991 }
1992
1993
1985 void Assembler::cvttsd2si(Register dst, const Operand& src) { 1994 void Assembler::cvttsd2si(Register dst, const Operand& src) {
1986 EnsureSpace ensure_space(this); 1995 EnsureSpace ensure_space(this);
1987 EMIT(0xF2); 1996 EMIT(0xF2);
1988 EMIT(0x0F); 1997 EMIT(0x0F);
1989 EMIT(0x2C); 1998 EMIT(0x2C);
1990 emit_operand(dst, src); 1999 emit_operand(dst, src);
1991 } 2000 }
1992 2001
1993 2002
2003 void Assembler::cvtsd2si(Register dst, const Operand& src) {
2004 EnsureSpace ensure_space(this);
2005 EMIT(0xF2);
2006 EMIT(0x0F);
2007 EMIT(0x2D);
2008 emit_operand(dst, src);
2009 }
2010
2011
1994 void Assembler::cvtsd2si(Register dst, XMMRegister src) { 2012 void Assembler::cvtsd2si(Register dst, XMMRegister src) {
1995 EnsureSpace ensure_space(this); 2013 EnsureSpace ensure_space(this);
1996 EMIT(0xF2); 2014 EMIT(0xF2);
1997 EMIT(0x0F); 2015 EMIT(0x0F);
1998 EMIT(0x2D); 2016 EMIT(0x2D);
1999 emit_sse_operand(dst, src); 2017 emit_sse_operand(dst, src);
2000 } 2018 }
2001 2019
2002 2020
2003 void Assembler::cvtsi2ss(XMMRegister dst, const Operand& src) { 2021 void Assembler::cvtsi2ss(XMMRegister dst, const Operand& src) {
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2192 EMIT(0x66); 2210 EMIT(0x66);
2193 EMIT(0x0F); 2211 EMIT(0x0F);
2194 EMIT(0x3A); 2212 EMIT(0x3A);
2195 EMIT(0x0B); 2213 EMIT(0x0B);
2196 emit_sse_operand(dst, src); 2214 emit_sse_operand(dst, src);
2197 // Mask precision exeption. 2215 // Mask precision exeption.
2198 EMIT(static_cast<byte>(mode) | 0x8); 2216 EMIT(static_cast<byte>(mode) | 0x8);
2199 } 2217 }
2200 2218
2201 2219
2220 void Assembler::ldmxcsr(const Operand& dst) {
2221 EnsureSpace ensure_space(this);
2222 EMIT(0x0F);
2223 EMIT(0xAE);
2224 emit_operand(2, dst);
2225 }
2226
2227
2228 void Assembler::stmxcsr(const Operand& dst) {
2229 EnsureSpace ensure_space(this);
2230 EMIT(0x0F);
2231 EMIT(0xAE);
2232 emit_operand(3, dst);
2233 }
2234
2235
2202 void Assembler::movmskpd(Register dst, XMMRegister src) { 2236 void Assembler::movmskpd(Register dst, XMMRegister src) {
2203 EnsureSpace ensure_space(this); 2237 EnsureSpace ensure_space(this);
2204 EMIT(0x66); 2238 EMIT(0x66);
2205 EMIT(0x0F); 2239 EMIT(0x0F);
2206 EMIT(0x50); 2240 EMIT(0x50);
2207 emit_sse_operand(dst, src); 2241 emit_sse_operand(dst, src);
2208 } 2242 }
2209 2243
2210 2244
2211 void Assembler::movmskps(Register dst, XMMRegister src) { 2245 void Assembler::movmskps(Register dst, XMMRegister src) {
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2842 emit(x); 2876 emit(x);
2843 } else { 2877 } else {
2844 EMIT(0x81); // using a literal 32-bit immediate. 2878 EMIT(0x81); // using a literal 32-bit immediate.
2845 emit_operand(ireg, dst); 2879 emit_operand(ireg, dst);
2846 emit(x); 2880 emit(x);
2847 } 2881 }
2848 } 2882 }
2849 2883
2850 2884
2851 void Assembler::emit_operand(Register reg, const Operand& adr) { 2885 void Assembler::emit_operand(Register reg, const Operand& adr) {
2886 emit_operand(reg.code(), adr);
2887 }
2888
2889
2890 void Assembler::emit_operand(int code, const Operand& adr) {
2891 DCHECK(is_uint3(code));
2852 const unsigned length = adr.len_; 2892 const unsigned length = adr.len_;
2853 DCHECK(length > 0); 2893 DCHECK(length > 0);
2854 2894
2855 // Emit updated ModRM byte containing the given register. 2895 // Emit updated ModRM byte containing the given register.
2856 pc_[0] = (adr.buf_[0] & ~0x38) | (reg.code() << 3); 2896 pc_[0] = (adr.buf_[0] & ~0x38) | (code << 3);
2857 2897
2858 // Emit the rest of the encoded operand. 2898 // Emit the rest of the encoded operand.
2859 for (unsigned i = 1; i < length; i++) pc_[i] = adr.buf_[i]; 2899 for (unsigned i = 1; i < length; i++) pc_[i] = adr.buf_[i];
2860 pc_ += length; 2900 pc_ += length;
2861 2901
2862 // Emit relocation information if necessary. 2902 // Emit relocation information if necessary.
2863 if (length >= sizeof(int32_t) && !RelocInfo::IsNone(adr.rmode_)) { 2903 if (length >= sizeof(int32_t) && !RelocInfo::IsNone(adr.rmode_)) {
2864 pc_ -= sizeof(int32_t); // pc_ must be *at* disp32 2904 pc_ -= sizeof(int32_t); // pc_ must be *at* disp32
2865 RecordRelocInfo(adr.rmode_); 2905 RecordRelocInfo(adr.rmode_);
2866 if (adr.rmode_ == RelocInfo::INTERNAL_REFERENCE) { // Fixup for labels 2906 if (adr.rmode_ == RelocInfo::INTERNAL_REFERENCE) { // Fixup for labels
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2949 fflush(coverage_log); 2989 fflush(coverage_log);
2950 } 2990 }
2951 } 2991 }
2952 2992
2953 #endif 2993 #endif
2954 2994
2955 } // namespace internal 2995 } // namespace internal
2956 } // namespace v8 2996 } // namespace v8
2957 2997
2958 #endif // V8_TARGET_ARCH_IA32 2998 #endif // V8_TARGET_ARCH_IA32
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