[turbofan] Implement rounding of floats on x64 and ia32 without sse4.1.

src/compiler/x64/code-generator-x64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/code-generator.h"
 
 #include "src/ast/scopes.h"
 #include "src/compiler/code-generator-impl.h"
 #include "src/compiler/gap-resolver.h"
 #include "src/compiler/node-matchers.h"
@@ skipping 923 matching lines @@
     case kSSEFloat32Max:
       ASSEMBLE_SSE_BINOP(maxss);
       break;
     case kSSEFloat32Min:
       ASSEMBLE_SSE_BINOP(minss);
       break;
     case kSSEFloat32ToFloat64:
       ASSEMBLE_SSE_UNOP(Cvtss2sd);
       break;
     case kSSEFloat32Round: {
-      CpuFeatureScope sse_scope(masm(), SSE4_1);
       RoundingMode const mode =
           static_cast<RoundingMode>(MiscField::decode(instr->opcode()));
-      __ Roundss(i.OutputDoubleRegister(), i.InputDoubleRegister(0), mode);
+      if (CpuFeatures::IsSupported(SSE4_1)) {
+        CpuFeatureScope sse_scope(masm(), SSE4_1);
+        __ Roundss(i.OutputDoubleRegister(), i.InputDoubleRegister(0), mode);
+      } else {
+        // Set the rounding mode.
+        // We have to store the original rounding mode in memory.
+        __ subq(rsp, Immediate(kPointerSize * 2));
+        __ stmxcsr(Operand(rsp, 0));
+        __ movl(kScratchRegister, Operand(rsp, 0));
+        __ andl(kScratchRegister, Immediate(0xffff9fff));
+        __ orl(kScratchRegister, Immediate(mode << 13));
+        __ movl(Operand(rsp, kPointerSize), kScratchRegister);
+        __ ldmxcsr(Operand(rsp, kPointerSize));
+
+        // Start with the conversion.
+        if (instr->InputAt(0)->IsDoubleRegister()) {
+          __ Cvtss2siq(kScratchRegister, i.InputDoubleRegister(0));
+        } else {
+          __ Cvtss2siq(kScratchRegister, i.InputOperand(0));
+        }
+
+        Label out_of_range;
+        Label done;
+        __ cmpq(kScratchRegister, Immediate(1));
+        // If the conversion results in INT64_MIN, then the input is out of
+        // int64 range.
+        __ j(overflow, &out_of_range);
+        // Rounding is done by converting the value back to float.
+        __ Cvtqsi2ss(i.OutputDoubleRegister(), kScratchRegister);
+        __ jmp(&done);
+
+        __ bind(&out_of_range);
+        // The input is out of int64 range. Fractions are not possible for
+        // inputs out of int64 range, so we don't have to do any rounding.
+        if (instr->InputAt(0)->IsDoubleRegister()) {
+          __ movss(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
+        } else {
+          __ movss(i.OutputDoubleRegister(), i.InputOperand(0));
+        }
+
+        __ bind(&done);
+        // Restore the original rounding mode.
+        __ ldmxcsr(Operand(rsp, 0));
+        __ addq(rsp, Immediate(kPointerSize * 2));
+      }
       break;
     }
     case kSSEFloat64Cmp:
       ASSEMBLE_SSE_BINOP(Ucomisd);
       break;
     case kSSEFloat64Add:
       ASSEMBLE_SSE_BINOP(addsd);
       break;
     case kSSEFloat64Sub:
       ASSEMBLE_SSE_BINOP(subsd);
@@ skipping 56 matching lines @@
       // TODO(bmeurer): Use RIP relative 128-bit constants.
       __ pcmpeqd(kScratchDoubleReg, kScratchDoubleReg);
       __ psllq(kScratchDoubleReg, 63);
       __ xorpd(i.OutputDoubleRegister(), kScratchDoubleReg);
       break;
     }
     case kSSEFloat64Sqrt:
       ASSEMBLE_SSE_UNOP(sqrtsd);
       break;
     case kSSEFloat64Round: {
-      CpuFeatureScope sse_scope(masm(), SSE4_1);
       RoundingMode const mode =
           static_cast<RoundingMode>(MiscField::decode(instr->opcode()));
-      __ Roundsd(i.OutputDoubleRegister(), i.InputDoubleRegister(0), mode);
+      if (CpuFeatures::IsSupported(SSE4_1)) {
+        CpuFeatureScope sse_scope(masm(), SSE4_1);
+        __ Roundsd(i.OutputDoubleRegister(), i.InputDoubleRegister(0), mode);
+      } else {
+        // Set the rounding mode.
+        // We have to store the original rounding mode in memory.
+        __ subq(rsp, Immediate(kPointerSize * 2));
+        __ stmxcsr(Operand(rsp, 0));
+        __ movl(kScratchRegister, Operand(rsp, 0));
+        __ andl(kScratchRegister, Immediate(0xffff9fff));
+        __ orl(kScratchRegister, Immediate(mode << 13));
+        __ movl(Operand(rsp, kPointerSize), kScratchRegister);
+        __ ldmxcsr(Operand(rsp, kPointerSize));
+
+        // Start with the conversion.
+        if (instr->InputAt(0)->IsDoubleRegister()) {
+          __ Cvtsd2siq(kScratchRegister, i.InputDoubleRegister(0));
+        } else {
+          __ Cvtsd2siq(kScratchRegister, i.InputOperand(0));
+        }
+
+        Label out_of_range;
+        Label done;
+        __ cmpq(kScratchRegister, Immediate(1));
+        // If the conversion results in INT64_MIN, but the input was not
+        // INT64_MIN, then the conversion fails.
+        __ j(overflow, &out_of_range);
+        __ Cvtqsi2sd(i.OutputDoubleRegister(), kScratchRegister);
+        __ jmp(&done);
+
+        __ bind(&out_of_range);
+        // The input is out of int64 range. Fractions are not possible for
+        // inputs
+        // out of int64 range, so we don't have to do any rounding.
+        if (instr->InputAt(0)->IsDoubleRegister()) {
+          __ movsd(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
+        } else {
+          __ movsd(i.OutputDoubleRegister(), i.InputOperand(0));
+        }
+
+        __ bind(&done);
+        // Restore the original rounding mode.
+        __ ldmxcsr(Operand(rsp, 0));
+        __ addq(rsp, Immediate(kPointerSize * 2));
+      }
       break;
     }
     case kSSEFloat64ToFloat32:
       ASSEMBLE_SSE_UNOP(Cvtsd2ss);
       break;
     case kSSEFloat64ToInt32:
       if (instr->InputAt(0)->IsDoubleRegister()) {
         __ Cvttsd2si(i.OutputRegister(), i.InputDoubleRegister(0));
       } else {
         __ Cvttsd2si(i.OutputRegister(), i.InputOperand(0));
@@ skipping 1069 matching lines @@
     int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc;
     __ Nop(padding_size);
   }
 }
 
 #undef __
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8