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Side by Side Diff: src/compiler/arm64/code-generator-arm64.cc

Issue 1583323004: [turbofan] Add the TruncateFloat32ToInt32 operator to turbofan. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fixed a small bug Created 4 years, 11 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include "src/arm64/frames-arm64.h" 7 #include "src/arm64/frames-arm64.h"
8 #include "src/arm64/macro-assembler-arm64.h" 8 #include "src/arm64/macro-assembler-arm64.h"
9 #include "src/ast/scopes.h" 9 #include "src/ast/scopes.h"
10 #include "src/compiler/code-generator-impl.h" 10 #include "src/compiler/code-generator-impl.h"
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1035 break; 1035 break;
1036 case kArm64Float64Sqrt: 1036 case kArm64Float64Sqrt:
1037 __ Fsqrt(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); 1037 __ Fsqrt(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
1038 break; 1038 break;
1039 case kArm64Float32ToFloat64: 1039 case kArm64Float32ToFloat64:
1040 __ Fcvt(i.OutputDoubleRegister(), i.InputDoubleRegister(0).S()); 1040 __ Fcvt(i.OutputDoubleRegister(), i.InputDoubleRegister(0).S());
1041 break; 1041 break;
1042 case kArm64Float64ToFloat32: 1042 case kArm64Float64ToFloat32:
1043 __ Fcvt(i.OutputDoubleRegister().S(), i.InputDoubleRegister(0)); 1043 __ Fcvt(i.OutputDoubleRegister().S(), i.InputDoubleRegister(0));
1044 break; 1044 break;
1045 case kArm64Float32ToInt32:
1046 __ Fcvtzs(i.OutputRegister32(), i.InputFloat32Register(0));
1047 break;
1045 case kArm64Float64ToInt32: 1048 case kArm64Float64ToInt32:
1046 __ Fcvtzs(i.OutputRegister32(), i.InputDoubleRegister(0)); 1049 __ Fcvtzs(i.OutputRegister32(), i.InputDoubleRegister(0));
1047 break; 1050 break;
1048 case kArm64Float64ToUint32: 1051 case kArm64Float64ToUint32:
1049 __ Fcvtzu(i.OutputRegister32(), i.InputDoubleRegister(0)); 1052 __ Fcvtzu(i.OutputRegister32(), i.InputDoubleRegister(0));
1050 break; 1053 break;
1051 case kArm64Float32ToInt64: 1054 case kArm64Float32ToInt64:
1052 __ Fcvtzs(i.OutputRegister64(), i.InputFloat32Register(0)); 1055 __ Fcvtzs(i.OutputRegister64(), i.InputFloat32Register(0));
1053 if (i.OutputCount() > 1) { 1056 if (i.OutputCount() > 1) {
1054 __ Mov(i.OutputRegister(1), 1); 1057 __ Mov(i.OutputRegister(1), 1);
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1640 padding_size -= kInstructionSize; 1643 padding_size -= kInstructionSize;
1641 } 1644 }
1642 } 1645 }
1643 } 1646 }
1644 1647
1645 #undef __ 1648 #undef __
1646 1649
1647 } // namespace compiler 1650 } // namespace compiler
1648 } // namespace internal 1651 } // namespace internal
1649 } // namespace v8 1652 } // namespace v8
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