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Side by Side Diff: tests_lit/llvm2ice_tests/rmw.ll

Issue 1579203002: Fix bitcode parser to check type signatures of functions. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Commit patch. Created 4 years, 11 months ago
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1 ; This tests Read-Modify-Write (RMW) detection and lowering at the O2 1 ; This tests Read-Modify-Write (RMW) detection and lowering at the O2
2 ; optimization level. 2 ; optimization level.
3 3
4 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 4 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
5 ; RUN: --target x8632 -i %s --args -O2 \ 5 ; RUN: --target x8632 -i %s --args -O2 \
6 ; RUN: | %if --need=target_X8632 --command FileCheck %s 6 ; RUN: | %if --need=target_X8632 --command FileCheck %s
7 7
8 define internal void @rmw_add_i32_var(i32 %addr_arg, i32 %var) { 8 define internal void @rmw_add_i32_var(i32 %addr_arg, i32 %var) {
9 entry: 9 entry:
10 %addr = inttoptr i32 %addr_arg to i32* 10 %addr = inttoptr i32 %addr_arg to i32*
(...skipping 22 matching lines...) Expand all
33 entry: 33 entry:
34 %addr = inttoptr i32 %addr_arg to i32* 34 %addr = inttoptr i32 %addr_arg to i32*
35 %val = load i32, i32* %addr, align 1 35 %val = load i32, i32* %addr, align 1
36 %rmw = add i32 %val, %var 36 %rmw = add i32 %val, %var
37 store i32 %rmw, i32* %addr, align 1 37 store i32 %rmw, i32* %addr, align 1
38 ret i32 %rmw 38 ret i32 %rmw
39 } 39 }
40 ; CHECK-LABEL: no_rmw_add_i32_var 40 ; CHECK-LABEL: no_rmw_add_i32_var
41 ; CHECK: add e{{ax|bx|cx|dx|bp|di|si}},DWORD PTR [e{{ax|bx|cx|dx|bp|di|si}}] 41 ; CHECK: add e{{ax|bx|cx|dx|bp|di|si}},DWORD PTR [e{{ax|bx|cx|dx|bp|di|si}}]
42 42
43 define internal void @rmw_add_i16_var(i32 %addr_arg, i16 %var) { 43 define internal void @rmw_add_i16_var(i32 %addr_arg, i32 %var32) {
44 entry: 44 entry:
45 %var = trunc i32 %var32 to i16
45 %addr = inttoptr i32 %addr_arg to i16* 46 %addr = inttoptr i32 %addr_arg to i16*
46 %val = load i16, i16* %addr, align 1 47 %val = load i16, i16* %addr, align 1
47 %rmw = add i16 %val, %var 48 %rmw = add i16 %val, %var
48 store i16 %rmw, i16* %addr, align 1 49 store i16 %rmw, i16* %addr, align 1
49 ret void 50 ret void
50 } 51 }
51 ; Look for something like: add WORD PTR [eax],cx 52 ; Look for something like: add WORD PTR [eax],cx
52 ; CHECK-LABEL: rmw_add_i16_var 53 ; CHECK-LABEL: rmw_add_i16_var
53 ; CHECK: add WORD PTR [e{{ax|bx|cx|dx|bp|di|si}}],{{ax|bx|cx|dx|bp|di|si}} 54 ; CHECK: add WORD PTR [e{{ax|bx|cx|dx|bp|di|si}}],{{ax|bx|cx|dx|bp|di|si}}
54 55
55 define internal void @rmw_add_i16_imm(i32 %addr_arg) { 56 define internal void @rmw_add_i16_imm(i32 %addr_arg) {
56 entry: 57 entry:
57 %addr = inttoptr i32 %addr_arg to i16* 58 %addr = inttoptr i32 %addr_arg to i16*
58 %val = load i16, i16* %addr, align 1 59 %val = load i16, i16* %addr, align 1
59 %rmw = add i16 %val, 19 60 %rmw = add i16 %val, 19
60 store i16 %rmw, i16* %addr, align 1 61 store i16 %rmw, i16* %addr, align 1
61 ret void 62 ret void
62 } 63 }
63 ; Look for something like: add WORD PTR [eax],0x13 64 ; Look for something like: add WORD PTR [eax],0x13
64 ; CHECK-LABEL: rmw_add_i16_imm 65 ; CHECK-LABEL: rmw_add_i16_imm
65 ; CHECK: add WORD PTR [e{{ax|bx|cx|dx|bp|di|si}}],0x13 66 ; CHECK: add WORD PTR [e{{ax|bx|cx|dx|bp|di|si}}],0x13
66 67
67 define internal void @rmw_add_i8_var(i32 %addr_arg, i8 %var) { 68 define internal void @rmw_add_i8_var(i32 %addr_arg, i32 %var32) {
68 entry: 69 entry:
70 %var = trunc i32 %var32 to i8
69 %addr = inttoptr i32 %addr_arg to i8* 71 %addr = inttoptr i32 %addr_arg to i8*
70 %val = load i8, i8* %addr, align 1 72 %val = load i8, i8* %addr, align 1
71 %rmw = add i8 %val, %var 73 %rmw = add i8 %val, %var
72 store i8 %rmw, i8* %addr, align 1 74 store i8 %rmw, i8* %addr, align 1
73 ret void 75 ret void
74 } 76 }
75 ; Look for something like: add BYTE PTR [eax],cl 77 ; Look for something like: add BYTE PTR [eax],cl
76 ; CHECK-LABEL: rmw_add_i8_var 78 ; CHECK-LABEL: rmw_add_i8_var
77 ; CHECK: add BYTE PTR [e{{ax|bx|cx|dx|bp|di|si}}],{{al|bl|cl|dl}} 79 ; CHECK: add BYTE PTR [e{{ax|bx|cx|dx|bp|di|si}}],{{al|bl|cl|dl}}
78 80
(...skipping 56 matching lines...) Expand 10 before | Expand all | Expand 10 after
135 entry: 137 entry:
136 %addr = inttoptr i32 %addr_arg to i64* 138 %addr = inttoptr i32 %addr_arg to i64*
137 %val = load i64, i64* %addr, align 1 139 %val = load i64, i64* %addr, align 1
138 %rmw = add i64 %val, undef 140 %rmw = add i64 %val, undef
139 store i64 %rmw, i64* %addr, align 1 141 store i64 %rmw, i64* %addr, align 1
140 ret void 142 ret void
141 } 143 }
142 ; CHECK-LABEL: rmw_add_i64_undef 144 ; CHECK-LABEL: rmw_add_i64_undef
143 ; CHECK: add DWORD PTR [e{{ax|bx|cx|dx|bp|di|si}}],0x0 145 ; CHECK: add DWORD PTR [e{{ax|bx|cx|dx|bp|di|si}}],0x0
144 ; CHECK: adc DWORD PTR [e{{ax|bx|cx|dx|bp|di|si}}+0x4],0x0 146 ; CHECK: adc DWORD PTR [e{{ax|bx|cx|dx|bp|di|si}}+0x4],0x0
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