Index: src/compiler/mips/code-generator-mips.cc |
diff --git a/src/compiler/mips/code-generator-mips.cc b/src/compiler/mips/code-generator-mips.cc |
index c1f722d30e2674a68753fea16b16c706e7300aa9..aac516f92bf9c81293a4e3914be5549fd2160a58 100644 |
--- a/src/compiler/mips/code-generator-mips.cc |
+++ b/src/compiler/mips/code-generator-mips.cc |
@@ -118,7 +118,7 @@ class MipsOperandConverter final : public InstructionOperandConverter { |
MemOperand MemoryOperand(size_t index = 0) { return MemoryOperand(&index); } |
MemOperand ToMemOperand(InstructionOperand* op) const { |
- DCHECK(op != NULL); |
+ DCHECK_NOT_NULL(op); |
DCHECK(op->IsStackSlot() || op->IsDoubleStackSlot()); |
FrameOffset offset = frame_access_state()->GetFrameOffset( |
AllocatedOperand::cast(op)->index()); |
@@ -1221,7 +1221,7 @@ void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) { |
!__ IsDoubleZeroRegSet()) { |
__ Move(kDoubleRegZero, 0.0); |
} |
- __ BranchF32(tlabel, NULL, cc, left, right); |
+ __ BranchF32(tlabel, nullptr, cc, left, right); |
} else if (instr->arch_opcode() == kMipsCmpD) { |
if (!convertCondition(branch->condition, cc)) { |
UNSUPPORTED_COND(kMips64CmpD, branch->condition); |
@@ -1232,7 +1232,7 @@ void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) { |
!__ IsDoubleZeroRegSet()) { |
__ Move(kDoubleRegZero, 0.0); |
} |
- __ BranchF64(tlabel, NULL, cc, left, right); |
+ __ BranchF64(tlabel, nullptr, cc, left, right); |
} else { |
PrintF("AssembleArchBranch Unimplemented arch_opcode: %d\n", |
instr->arch_opcode()); |
@@ -1541,7 +1541,7 @@ void CodeGenerator::AssembleReturn() { |
void CodeGenerator::AssembleMove(InstructionOperand* source, |
InstructionOperand* destination) { |
- MipsOperandConverter g(this, NULL); |
+ MipsOperandConverter g(this, nullptr); |
// Dispatch on the source and destination operand kinds. Not all |
// combinations are possible. |
if (source->IsRegister()) { |
@@ -1647,7 +1647,7 @@ void CodeGenerator::AssembleMove(InstructionOperand* source, |
void CodeGenerator::AssembleSwap(InstructionOperand* source, |
InstructionOperand* destination) { |
- MipsOperandConverter g(this, NULL); |
+ MipsOperandConverter g(this, nullptr); |
// Dispatch on the source and destination operand kinds. Not all |
// combinations are possible. |
if (source->IsRegister()) { |