[turbofan] Build s/NULL/nullptr/g and CHECK(x != nullptr) to CHECK_NOT_NULL(x).

src/compiler/mips64/code-generator-mips64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/ast/scopes.h"
 #include "src/compiler/code-generator.h"
 #include "src/compiler/code-generator-impl.h"
 #include "src/compiler/gap-resolver.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler/osr.h"
@@ skipping 100 matching lines @@
         // TODO(plind): r6 address mode, to be implemented ...
         UNREACHABLE();
     }
     UNREACHABLE();
     return MemOperand(no_reg);
   }
 
   MemOperand MemoryOperand(size_t index = 0) { return MemoryOperand(&index); }
 
   MemOperand ToMemOperand(InstructionOperand* op) const {
-    DCHECK(op != NULL);
+    DCHECK_NOT_NULL(op);
     DCHECK(op->IsStackSlot() || op->IsDoubleStackSlot());
     FrameOffset offset = frame_access_state()->GetFrameOffset(
         AllocatedOperand::cast(op)->index());
     return MemOperand(offset.from_stack_pointer() ? sp : fp, offset.offset());
   }
 };
 
 
 static inline bool HasRegisterInput(Instruction* instr, size_t index) {
   return instr->InputAt(index)->IsRegister();
@@ skipping 1308 matching lines @@
   } else if (instr->arch_opcode() == kMips64CmpS) {
     if (!convertCondition(branch->condition, cc)) {
       UNSUPPORTED_COND(kMips64CmpS, branch->condition);
     }
     FPURegister left = i.InputOrZeroSingleRegister(0);
     FPURegister right = i.InputOrZeroSingleRegister(1);
     if ((left.is(kDoubleRegZero) || right.is(kDoubleRegZero)) &&
         !__ IsDoubleZeroRegSet()) {
       __ Move(kDoubleRegZero, 0.0);
     }
-    __ BranchF32(tlabel, NULL, cc, left, right);
+    __ BranchF32(tlabel, nullptr, cc, left, right);
   } else if (instr->arch_opcode() == kMips64CmpD) {
     if (!convertCondition(branch->condition, cc)) {
       UNSUPPORTED_COND(kMips64CmpD, branch->condition);
     }
     FPURegister left = i.InputOrZeroDoubleRegister(0);
     FPURegister right = i.InputOrZeroDoubleRegister(1);
     if ((left.is(kDoubleRegZero) || right.is(kDoubleRegZero)) &&
         !__ IsDoubleZeroRegSet()) {
       __ Move(kDoubleRegZero, 0.0);
     }
-    __ BranchF64(tlabel, NULL, cc, left, right);
+    __ BranchF64(tlabel, nullptr, cc, left, right);
   } else {
     PrintF("AssembleArchBranch Unimplemented arch_opcode: %d\n",
            instr->arch_opcode());
     UNIMPLEMENTED();
   }
   if (!branch->fallthru) __ Branch(flabel);  // no fallthru to flabel.
 }
 
 
 void CodeGenerator::AssembleArchJump(RpoNumber target) {
@@ skipping 299 matching lines @@
   if (pop_count != 0) {
     __ DropAndRet(pop_count);
   } else {
     __ Ret();
   }
 }
 
 
 void CodeGenerator::AssembleMove(InstructionOperand* source,
                                  InstructionOperand* destination) {
-  MipsOperandConverter g(this, NULL);
+  MipsOperandConverter g(this, nullptr);
   // Dispatch on the source and destination operand kinds.  Not all
   // combinations are possible.
   if (source->IsRegister()) {
     DCHECK(destination->IsRegister() || destination->IsStackSlot());
     Register src = g.ToRegister(source);
     if (destination->IsRegister()) {
       __ mov(g.ToRegister(destination), src);
     } else {
       __ sd(src, g.ToMemOperand(destination));
     }
@@ skipping 85 matching lines @@
       __ sdc1(temp, g.ToMemOperand(destination));
     }
   } else {
     UNREACHABLE();
   }
 }
 
 
 void CodeGenerator::AssembleSwap(InstructionOperand* source,
                                  InstructionOperand* destination) {
-  MipsOperandConverter g(this, NULL);
+  MipsOperandConverter g(this, nullptr);
   // Dispatch on the source and destination operand kinds.  Not all
   // combinations are possible.
   if (source->IsRegister()) {
     // Register-register.
     Register temp = kScratchReg;
     Register src = g.ToRegister(source);
     if (destination->IsRegister()) {
       Register dst = g.ToRegister(destination);
       __ Move(temp, src);
       __ Move(src, dst);
@@ skipping 84 matching lines @@
       padding_size -= v8::internal::Assembler::kInstrSize;
     }
   }
 }
 
 #undef __
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8