Subzero: Fix g++ warnings.

src/IceTargetLoweringARM32.cpp

 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 2605 matching lines @@
 
   bool aggregateWithAdd() const {
     switch (Op) {
     case AO_Invalid:
       llvm::report_fatal_error("Invalid Strength Reduction Operations.");
     case AO_Add:
       return true;
     case AO_Sub:
       return false;
     }
+    llvm_unreachable("(silence g++ warning)");
   }
 
   uint32_t shAmt() const { return ShAmt; }
 
 private:
   AggregationOperation Op = AO_Invalid;
   uint32_t ShAmt;
 };
 
 // [RangeStart, RangeEnd] is a range of 1s in Src.
@@ skipping 1124 matching lines @@
       _fcmp_ll_NUM
 };
 
 enum {
 #define X(tag, str) _fcmp_hl_##tag = InstFcmp::tag,
   ICEINSTFCMP_TABLE
 #undef X
       _fcmp_hl_NUM
 };
 
-static_assert(_fcmp_hl_NUM == _fcmp_ll_NUM,
+static_assert((uint32_t)_fcmp_hl_NUM == (uint32_t)_fcmp_ll_NUM,
               "Inconsistency between high-level and low-level fcmp tags.");
 #define X(tag, str)                                                            \
   static_assert(                                                               \
-      _fcmp_hl_##tag == _fcmp_ll_##tag,                                        \
+      (uint32_t)_fcmp_hl_##tag == (uint32_t)_fcmp_ll_##tag,                    \
       "Inconsistency between high-level and low-level fcmp tag " #tag);
 ICEINSTFCMP_TABLE
 #undef X
 
 struct {
   CondARM32::Cond CC0;
   CondARM32::Cond CC1;
 } TableFcmp[] = {
 #define X(val, CC0, CC1)                                                       \
   { CondARM32::CC0, CondARM32::CC1 }                                           \
@@ skipping 2510 matching lines @@
 template <> struct ConstantPoolEmitterTraits<float> {
   using ConstantType = ConstantFloat;
   static constexpr Type IceType = IceType_f32;
   // AsmTag and TypeName can't be constexpr because llvm::StringRef is unhappy
   // about them being constexpr.
   static const char AsmTag[];
   static const char TypeName[];
   static uint64_t bitcastToUint64(float Value) {
     static_assert(sizeof(Value) == sizeof(uint32_t),
                   "Float should be 4 bytes.");
-    uint32_t IntValue = *reinterpret_cast<uint32_t *>(&Value);
+    const uint32_t IntValue = Utils::bitCopy<uint32_t>(Value);
     return static_cast<uint64_t>(IntValue);
   }
 };
 const char ConstantPoolEmitterTraits<float>::AsmTag[] = ".long";
 const char ConstantPoolEmitterTraits<float>::TypeName[] = "f32";
 
 template <> struct ConstantPoolEmitterTraits<double> {
   using ConstantType = ConstantDouble;
   static constexpr Type IceType = IceType_f64;
   static const char AsmTag[];
   static const char TypeName[];
   static uint64_t bitcastToUint64(double Value) {
     static_assert(sizeof(double) == sizeof(uint64_t),
                   "Double should be 8 bytes.");
-    return *reinterpret_cast<uint64_t *>(&Value);
+    return Utils::bitCopy<uint64_t>(Value);
   }
 };
 const char ConstantPoolEmitterTraits<double>::AsmTag[] = ".quad";
 const char ConstantPoolEmitterTraits<double>::TypeName[] = "f64";
 
 template <typename T>
 void emitConstant(
     Ostream &Str, const GlobalContext *Ctx,
     const typename ConstantPoolEmitterTraits<T>::ConstantType *Const) {
   using Traits = ConstantPoolEmitterTraits<T>;
@@ skipping 117 matching lines @@
   // However, for compatibility with current NaCl LLVM, don't claim that.
   Str << ".eabi_attribute 14, 3   @ Tag_ABI_PCS_R9_use: Not used\n";
 }
 
 llvm::SmallBitVector TargetARM32::TypeToRegisterSet[IceType_NUM];
 llvm::SmallBitVector TargetARM32::RegisterAliases[RegARM32::Reg_NUM];
 llvm::SmallBitVector TargetARM32::ScratchRegs;
 
 } // end of namespace ARM32
 } // end of namespace Ice