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Issue 157543002: A64: Synchronize with r18581. (Closed) Base URL: https://v8.googlecode.com/svn/branches/experimental/a64
Patch Set: Created 6 years, 10 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 3499 matching lines...) Expand 10 before | Expand all | Expand 10 after
3510 SmiCheckType smi_check_type) { 3510 SmiCheckType smi_check_type) {
3511 if (smi_check_type == DO_SMI_CHECK) { 3511 if (smi_check_type == DO_SMI_CHECK) {
3512 JumpIfSmi(obj, fail); 3512 JumpIfSmi(obj, fail);
3513 } 3513 }
3514 lw(scratch, FieldMemOperand(obj, HeapObject::kMapOffset)); 3514 lw(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
3515 LoadRoot(at, index); 3515 LoadRoot(at, index);
3516 Branch(fail, ne, scratch, Operand(at)); 3516 Branch(fail, ne, scratch, Operand(at));
3517 } 3517 }
3518 3518
3519 3519
3520 void MacroAssembler::GetCFunctionDoubleResult(const DoubleRegister dst) { 3520 void MacroAssembler::MovFromFloatResult(DoubleRegister dst) {
3521 if (IsMipsSoftFloatABI) { 3521 if (IsMipsSoftFloatABI) {
3522 Move(dst, v0, v1); 3522 Move(dst, v0, v1);
3523 } else { 3523 } else {
3524 Move(dst, f0); // Reg f0 is o32 ABI FP return value. 3524 Move(dst, f0); // Reg f0 is o32 ABI FP return value.
3525 } 3525 }
3526 } 3526 }
3527 3527
3528 3528
3529 void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg) { 3529 void MacroAssembler::MovFromFloatParameter(DoubleRegister dst) {
3530 if (!IsMipsSoftFloatABI) { 3530 if (IsMipsSoftFloatABI) {
3531 Move(f12, dreg); 3531 Move(dst, a0, a1);
3532 } else { 3532 } else {
3533 Move(a0, a1, dreg); 3533 Move(dst, f12); // Reg f12 is o32 ABI FP first argument value.
3534 } 3534 }
3535 } 3535 }
3536 3536
3537 3537
3538 void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg1, 3538 void MacroAssembler::MovToFloatParameter(DoubleRegister src) {
3539 DoubleRegister dreg2) {
3540 if (!IsMipsSoftFloatABI) { 3539 if (!IsMipsSoftFloatABI) {
3541 if (dreg2.is(f12)) { 3540 Move(f12, src);
3542 ASSERT(!dreg1.is(f14));
3543 Move(f14, dreg2);
3544 Move(f12, dreg1);
3545 } else {
3546 Move(f12, dreg1);
3547 Move(f14, dreg2);
3548 }
3549 } else { 3541 } else {
3550 Move(a0, a1, dreg1); 3542 Move(a0, a1, src);
3551 Move(a2, a3, dreg2);
3552 } 3543 }
3553 } 3544 }
3554 3545
3555 3546
3556 void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg, 3547 void MacroAssembler::MovToFloatResult(DoubleRegister src) {
3557 Register reg) {
3558 if (!IsMipsSoftFloatABI) { 3548 if (!IsMipsSoftFloatABI) {
3559 Move(f12, dreg); 3549 Move(f0, src);
3560 Move(a2, reg);
3561 } else { 3550 } else {
3562 Move(a2, reg); 3551 Move(v0, v1, src);
3563 Move(a0, a1, dreg);
3564 } 3552 }
3565 } 3553 }
3566 3554
3555
3556 void MacroAssembler::MovToFloatParameters(DoubleRegister src1,
3557 DoubleRegister src2) {
3558 if (!IsMipsSoftFloatABI) {
3559 if (src2.is(f12)) {
3560 ASSERT(!src1.is(f14));
3561 Move(f14, src2);
3562 Move(f12, src1);
3563 } else {
3564 Move(f12, src1);
3565 Move(f14, src2);
3566 }
3567 } else {
3568 Move(a0, a1, src1);
3569 Move(a2, a3, src2);
3570 }
3571 }
3572
3567 3573
3568 void MacroAssembler::SetCallKind(Register dst, CallKind call_kind) { 3574 void MacroAssembler::SetCallKind(Register dst, CallKind call_kind) {
3569 // This macro takes the dst register to make the code more readable 3575 // This macro takes the dst register to make the code more readable
3570 // at the call sites. However, the dst register has to be t1 to 3576 // at the call sites. However, the dst register has to be t1 to
3571 // follow the calling convention which requires the call type to be 3577 // follow the calling convention which requires the call type to be
3572 // in t1. 3578 // in t1.
3573 ASSERT(dst.is(t1)); 3579 ASSERT(dst.is(t1));
3574 if (call_kind == CALL_AS_FUNCTION) { 3580 if (call_kind == CALL_AS_FUNCTION) {
3575 li(dst, Operand(Smi::FromInt(1))); 3581 li(dst, Operand(Smi::FromInt(1)));
3576 } else { 3582 } else {
(...skipping 321 matching lines...) Expand 10 before | Expand all | Expand 10 after
3898 Condition cond, 3904 Condition cond,
3899 Register r1, 3905 Register r1,
3900 const Operand& r2, 3906 const Operand& r2,
3901 BranchDelaySlot bd) { 3907 BranchDelaySlot bd) {
3902 ASSERT(AllowThisStubCall(stub)); // Stub calls are not allowed in some stubs. 3908 ASSERT(AllowThisStubCall(stub)); // Stub calls are not allowed in some stubs.
3903 Call(stub->GetCode(isolate()), RelocInfo::CODE_TARGET, ast_id, 3909 Call(stub->GetCode(isolate()), RelocInfo::CODE_TARGET, ast_id,
3904 cond, r1, r2, bd); 3910 cond, r1, r2, bd);
3905 } 3911 }
3906 3912
3907 3913
3908 void MacroAssembler::TailCallStub(CodeStub* stub) { 3914 void MacroAssembler::TailCallStub(CodeStub* stub,
3909 Jump(stub->GetCode(isolate()), RelocInfo::CODE_TARGET); 3915 Condition cond,
3916 Register r1,
3917 const Operand& r2,
3918 BranchDelaySlot bd) {
3919 Jump(stub->GetCode(isolate()), RelocInfo::CODE_TARGET, cond, r1, r2, bd);
3910 } 3920 }
3911 3921
3912 3922
3913 static int AddressOffset(ExternalReference ref0, ExternalReference ref1) { 3923 static int AddressOffset(ExternalReference ref0, ExternalReference ref1) {
3914 return ref0.address() - ref1.address(); 3924 return ref0.address() - ref1.address();
3915 } 3925 }
3916 3926
3917 3927
3918 void MacroAssembler::CallApiFunctionAndReturn( 3928 void MacroAssembler::CallApiFunctionAndReturn(
3919 ExternalReference function, 3929 ExternalReference function,
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5785 opcode == BGTZL); 5795 opcode == BGTZL);
5786 opcode = (cond == eq) ? BEQ : BNE; 5796 opcode = (cond == eq) ? BEQ : BNE;
5787 instr = (instr & ~kOpcodeMask) | opcode; 5797 instr = (instr & ~kOpcodeMask) | opcode;
5788 masm_.emit(instr); 5798 masm_.emit(instr);
5789 } 5799 }
5790 5800
5791 5801
5792 } } // namespace v8::internal 5802 } } // namespace v8::internal
5793 5803
5794 #endif // V8_TARGET_ARCH_MIPS 5804 #endif // V8_TARGET_ARCH_MIPS
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