Fix the g++ build.

src/IceRegistersARM32.h

 //===- subzero/src/IceRegistersARM32.h - Register information ---*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 99 matching lines @@
 #define X(val, encode, name, cc_arg, scratch, preserved, stackptr, frameptr,   \
           isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init)       \
   Encoded_##val = encode,
     REGARM32_VEC128_TABLE
 #undef X
         Encoded_Not_QReg = -1
   };
 
   static constexpr struct TableType {
     const char *Name;
-    int32_t Encoding : 10;
-    int32_t CCArg : 6;
-    int32_t Scratch : 1;
-    int32_t Preserved : 1;
-    int32_t StackPtr : 1;
-    int32_t FramePtr : 1;
-    int32_t IsGPR : 1;
-    int32_t IsInt : 1;
-    int32_t IsI64Pair : 1;
-    int32_t IsFP32 : 1;
-    int32_t IsFP64 : 1;
-    int32_t IsVec128 : 1;
+    unsigned Encoding : 10;
+    unsigned CCArg : 6;
+    unsigned Scratch : 1;
+    unsigned Preserved : 1;
+    unsigned StackPtr : 1;
+    unsigned FramePtr : 1;
+    unsigned IsGPR : 1;
+    unsigned IsInt : 1;
+    unsigned IsI64Pair : 1;
+    unsigned IsFP32 : 1;
+    unsigned IsFP64 : 1;
+    unsigned IsVec128 : 1;
 #define NUM_ALIASES_BITS 3
     SizeT NumAliases : (NUM_ALIASES_BITS + 1);
     uint16_t Aliases[1 << NUM_ALIASES_BITS];
 #undef NUM_ALIASES_BITS
   } Table[Reg_NUM] = {
 #define X(val, encode, name, cc_arg, scratch, preserved, stackptr, frameptr,   \
           isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init)       \
   {                                                                            \
     name, encode, cc_arg, scratch, preserved, stackptr, frameptr, isGPR,       \
         isInt, isI64Pair, isFP32, isFP64, isVec128,                            \
@@ skipping 101 matching lines @@
   }
 };
 
 // Extend enum RegClass with ARM32-specific register classes (if any).
 enum RegClassARM32 : uint8_t { RCARM32_NUM = RC_Target };
 
 } // end of namespace ARM32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEREGISTERSARM32_H