Implements include/exclude register lists for translation.

src/IceTargetLoweringARM32.cpp

Index: src/IceTargetLoweringARM32.cpp
diff --git a/src/IceTargetLoweringARM32.cpp b/src/IceTargetLoweringARM32.cpp
index 08e26078de5390a26a9e7bf6705311e552420d5d..c4903197b7a1f89174aa6a8086d55660b7f1536c 100644
--- a/src/IceTargetLoweringARM32.cpp
+++ b/src/IceTargetLoweringARM32.cpp
@@ -50,8 +50,8 @@ createTargetHeaderLowering(::Ice::GlobalContext *Ctx) {
   return ::Ice::ARM32::TargetHeaderARM32::create(Ctx);
 }
 
-void staticInit(const ::Ice::ClFlags &Flags) {
-  ::Ice::ARM32::TargetARM32::staticInit(Flags);
+void staticInit(::Ice::GlobalContext *Ctx) {
+  ::Ice::ARM32::TargetARM32::staticInit(Ctx);
 }
 } // end of namespace ARM32
 
@@ -235,8 +235,8 @@ TargetARM32::TargetARM32(Cfg *Func)
     : TargetLowering(Func), NeedSandboxing(Ctx->getFlags().getUseSandboxing()),
       CPUFeatures(Func->getContext()->getFlags()) {}
 
-void TargetARM32::staticInit(const ClFlags &Flags) {
-  (void)Flags;
+void TargetARM32::staticInit(GlobalContext *Ctx) {
+
   // Limit this size (or do all bitsets need to be the same width)???
   llvm::SmallBitVector IntegerRegisters(RegARM32::Reg_NUM);
   llvm::SmallBitVector I64PairRegisters(RegARM32::Reg_NUM);
@@ -289,6 +289,18 @@ void TargetARM32::staticInit(const ClFlags &Flags) {
   TypeToRegisterSet[IceType_v8i16] = VectorRegisters;
   TypeToRegisterSet[IceType_v4i32] = VectorRegisters;
   TypeToRegisterSet[IceType_v4f32] = VectorRegisters;
+
+  filterTypeToRegisterSet(Ctx, RegARM32::Reg_NUM, TypeToRegisterSet,
+                          RCARM32_NUM, [](int32_t RegNum) -> IceString {
+                            IceString Name = RegARM32::getRegName(RegNum);
+                            IceString RegSeparator(", ");

[John, 2016/01/14 21:12:49]

this could be a

const IceString RegSeparator = ", ";

or (maybe, not sure):

constexpr char RegSeparator[] = ", ";

[Karl, 2016/01/14 22:00:53]

Used 'constexpr const RegSeparator[] = ", "' and then used
llvm::array_lengthof() to get the size.

+                            for (size_t Pos = Name.find(RegSeparator);
+                                 Pos != std::string::npos;
+                                 Pos = Name.find(RegSeparator)) {
+                              Name.replace(Pos, RegSeparator.size(), ":");
+                            }
+                            return Name;
+                          });
 }
 
 namespace {
@@ -1832,7 +1844,7 @@ llvm::SmallBitVector TargetARM32::getRegisterSet(RegSetMask Include,
                                                  RegSetMask Exclude) const {
   llvm::SmallBitVector Registers(RegARM32::Reg_NUM);
 
-  for (int i = 0; i < RegARM32::Reg_NUM; ++i) {
+  for (SizeT i = 0; i < RegARM32::Reg_NUM; ++i) {
     const auto &Entry = RegARM32::Table[i];
     if (Entry.Scratch && (Include & RegSet_CallerSave))
       Registers[i] = true;