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Side by Side Diff: src/IceRegistersMIPS32.h

Issue 1571433004: Implements include/exclude register lists for translation. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix nits. Created 4 years, 11 months ago
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1 //===- subzero/src/IceRegistersMIPS32.h - Register information --*- C++ -*-===// 1 //===- subzero/src/IceRegistersMIPS32.h - Register information --*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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51 }; 51 };
52 52
53 // TODO(jvoung): Floating point and vector registers... 53 // TODO(jvoung): Floating point and vector registers...
54 // Need to model overlap and difference in encoding too. 54 // Need to model overlap and difference in encoding too.
55 55
56 static inline GPRRegister getEncodedGPR(int32_t RegNum) { 56 static inline GPRRegister getEncodedGPR(int32_t RegNum) {
57 assert(Reg_GPR_First <= RegNum && RegNum <= Reg_GPR_Last); 57 assert(Reg_GPR_First <= RegNum && RegNum <= Reg_GPR_Last);
58 return GPRRegister(RegNum - Reg_GPR_First); 58 return GPRRegister(RegNum - Reg_GPR_First);
59 } 59 }
60 60
61 const char *getRegName(int32_t RegNum);
62
61 } // end of namespace RegMIPS32 63 } // end of namespace RegMIPS32
62 64
63 // Extend enum RegClass with MIPS32-specific register classes (if any). 65 // Extend enum RegClass with MIPS32-specific register classes (if any).
64 enum RegClassMIPS32 : uint8_t { RCMIPS32_NUM = RC_Target }; 66 enum RegClassMIPS32 : uint8_t { RCMIPS32_NUM = RC_Target };
65 67
66 } // end of namespace MIPS32 68 } // end of namespace MIPS32
67 } // end of namespace Ice 69 } // end of namespace Ice
68 70
69 #endif // SUBZERO_SRC_ICEREGISTERSMIPS32_H 71 #endif // SUBZERO_SRC_ICEREGISTERSMIPS32_H
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