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Side by Side Diff: src/IceAssemblerARM32.h

Issue 1570543002: Add VMULS and VMULD instructions to integrated ARM assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 4 years, 11 months ago
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1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===//
2 // 2 //
3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
4 // for details. All rights reserved. Use of this source code is governed by a 4 // for details. All rights reserved. Use of this source code is governed by a
5 // BSD-style license that can be found in the LICENSE file. 5 // BSD-style license that can be found in the LICENSE file.
6 // 6 //
7 // Modified by the Subzero authors. 7 // Modified by the Subzero authors.
8 // 8 //
9 //===----------------------------------------------------------------------===// 9 //===----------------------------------------------------------------------===//
10 // 10 //
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317 317
318 // Implements uxtb/uxth depending on type of OpSrc0. 318 // Implements uxtb/uxth depending on type of OpSrc0.
319 void uxt(const Operand *OpRd, const Operand *OpSrc0, CondARM32::Cond Cond); 319 void uxt(const Operand *OpRd, const Operand *OpSrc0, CondARM32::Cond Cond);
320 320
321 void vaddd(const Operand *OpDd, const Operand *OpDn, const Operand *OpDm, 321 void vaddd(const Operand *OpDd, const Operand *OpDn, const Operand *OpDm,
322 CondARM32::Cond Cond); 322 CondARM32::Cond Cond);
323 323
324 void vadds(const Operand *OpSd, const Operand *OpSn, const Operand *OpSm, 324 void vadds(const Operand *OpSd, const Operand *OpSn, const Operand *OpSm,
325 CondARM32::Cond Cond); 325 CondARM32::Cond Cond);
326 326
327 void vmuld(const Operand *OpDd, const Operand *OpDn, const Operand *OpDm,
328 CondARM32::Cond Cond);
329
330 void vmuls(const Operand *OpSd, const Operand *OpSn, const Operand *OpSm,
331 CondARM32::Cond Cond);
332
327 void vpop(const Variable *OpBaseReg, SizeT NumConsecRegs, 333 void vpop(const Variable *OpBaseReg, SizeT NumConsecRegs,
328 CondARM32::Cond Cond); 334 CondARM32::Cond Cond);
329 335
330 void vpush(const Variable *OpBaseReg, SizeT NumConsecRegs, 336 void vpush(const Variable *OpBaseReg, SizeT NumConsecRegs,
331 CondARM32::Cond Cond); 337 CondARM32::Cond Cond);
332 338
333 static bool classof(const Assembler *Asm) { 339 static bool classof(const Assembler *Asm) {
334 return Asm->getKind() == Asm_ARM32; 340 return Asm->getKind() == Asm_ARM32;
335 } 341 }
336 342
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480 486
481 // Emit VFP instruction with 3 S registers. 487 // Emit VFP instruction with 3 S registers.
482 void emitVFPsss(CondARM32::Cond Cond, IValueT Opcode, IValueT Sd, IValueT Sn, 488 void emitVFPsss(CondARM32::Cond Cond, IValueT Opcode, IValueT Sd, IValueT Sn,
483 IValueT Sm); 489 IValueT Sm);
484 }; 490 };
485 491
486 } // end of namespace ARM32 492 } // end of namespace ARM32
487 } // end of namespace Ice 493 } // end of namespace Ice
488 494
489 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H 495 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H
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