Add VDIVS and VDIVD instructions to the integrated ARM assembler.

tests_lit/assembler/arm32/vdiv.ll

Index: tests_lit/assembler/arm32/vdiv.ll
diff --git a/tests_lit/assembler/arm32/vadd.ll b/tests_lit/assembler/arm32/vdiv.ll
similarity index 54%
copy from tests_lit/assembler/arm32/vadd.ll
copy to tests_lit/assembler/arm32/vdiv.ll
index a03510340f949c626f54b901b93bcc0a4abb83cc..774d1836bd9163610a8c696b9a522f708b19fc9a 100644
--- a/tests_lit/assembler/arm32/vadd.ll
+++ b/tests_lit/assembler/arm32/vdiv.ll
@@ -1,4 +1,4 @@
-; Show that we know how to translate vadd.
+; Show that we know how to translate vdiv.
 
 ; NOTE: We use -O2 to get rid of memory stores.
 
@@ -20,43 +20,43 @@
 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
 ; RUN:   --args -O2 | FileCheck %s --check-prefix=DIS
 
-define internal float @testVaddFloat(float %v1, float %v2) {
-; ASM-LABEL: testVaddFloat:
-; DIS-LABEL: 00000000 <testVaddFloat>:
-; IASM-LABEL: testVaddFloat:
+define internal float @testVdivFloat(float %v1, float %v2) {
+; ASM-LABEL: testVdivFloat:
+; DIS-LABEL: 00000000 <testVdivFloat>:
+; IASM-LABEL: testVdivFloat:
 
 entry:
-; ASM-NEXT: .LtestVaddFloat$entry:
-; IASM-NEXT: .LtestVaddFloat$entry:
+; ASM-NEXT: .LtestVdivFloat$entry:
+; IASM-NEXT: .LtestVdivFloat$entry:
 
-  %res = fadd float %v1, %v2
+  %res = fdiv float %v1, %v2
 
-; ASM-NEXT:     vadd.f32        s0, s0, s1
-; DIS-NEXT:    0:       ee300a20
+; ASM-NEXT:     vdiv.f32        s0, s0, s1
+; DIS-NEXT:    0:       ee800a20
 ; IASM-NEXT:    .byte 0x20
 ; IASM-NEXT:    .byte 0xa
-; IASM-NEXT:    .byte 0x30
+; IASM-NEXT:    .byte 0x80
 ; IASM-NEXT:    .byte 0xee
 
   ret float %res
 }
 
-define internal double @testVaddDouble(double %v1, double %v2) {
-; ASM-LABEL: testVaddDouble:
-; DIS-LABEL: 00000010 <testVaddDouble>:
-; IASM-LABEL: testVaddDouble:
+define internal double @testVdivDouble(double %v1, double %v2) {
+; ASM-LABEL: testVdivDouble:
+; DIS-LABEL: 00000010 <testVdivDouble>:
+; IASM-LABEL: testVdivDouble:
 
 entry:
-; ASM-NEXT: .LtestVaddDouble$entry:
-; IASM-NEXT: .LtestVaddDouble$entry:
+; ASM-NEXT: .LtestVdivDouble$entry:
+; IASM-NEXT: .LtestVdivDouble$entry:
 
-  %res = fadd double %v1, %v2
+  %res = fdiv double %v1, %v2
 
-; ASM-NEXT:     vadd.f64        d0, d0, d1
-; DIS-NEXT:   10:       ee300b01
+; ASM-NEXT:     vdiv.f64        d0, d0, d1
+; DIS-NEXT:   10:       ee800b01
 ; IASM-NEXT:    .byte 0x1
 ; IASM-NEXT:    .byte 0xb
-; IASM-NEXT:    .byte 0x30
+; IASM-NEXT:    .byte 0x80
 ; IASM-NEXT:    .byte 0xee
 
   ret double %res