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Side by Side Diff: src/IceInstARM32.cpp

Issue 1568623003: Add VSUB{S,D} instructions to the integrated ARM assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Add comments to DART assembler. Created 4 years, 11 months ago
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1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// 1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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605 // TODO(kschimpf) Figure if more cases are needed. 605 // TODO(kschimpf) Figure if more cases are needed.
606 Asm->setNeedsTextFixup(); 606 Asm->setNeedsTextFixup();
607 break; 607 break;
608 case IceType_f32: 608 case IceType_f32:
609 Asm->vadds(getDest(), getSrc(0), getSrc(1), CondARM32::AL); 609 Asm->vadds(getDest(), getSrc(0), getSrc(1), CondARM32::AL);
610 break; 610 break;
611 case IceType_f64: 611 case IceType_f64:
612 Asm->vaddd(getDest(), getSrc(0), getSrc(1), CondARM32::AL); 612 Asm->vaddd(getDest(), getSrc(0), getSrc(1), CondARM32::AL);
613 break; 613 break;
614 } 614 }
615 if (Asm->needsTextFixup()) 615 assert(!Asm->needsTextFixup());
616 emitUsingTextFixup(Func); 616 }
617
618 template <> void InstARM32Vsub::emitIAS(const Cfg *Func) const {
619 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
620 const Variable *Dest = getDest();
621 switch (Dest->getType()) {
622 default:
623 // TODO(kschimpf) Figure if more cases are needed.
624 Asm->setNeedsTextFixup();
625 break;
626 case IceType_f32:
627 Asm->vsubs(getDest(), getSrc(0), getSrc(1), CondARM32::AL);
628 break;
629 case IceType_f64:
630 Asm->vsubd(getDest(), getSrc(0), getSrc(1), CondARM32::AL);
631 break;
632 }
633 assert(!Asm->needsTextFixup());
617 } 634 }
618 635
619 InstARM32Call::InstARM32Call(Cfg *Func, Variable *Dest, Operand *CallTarget) 636 InstARM32Call::InstARM32Call(Cfg *Func, Variable *Dest, Operand *CallTarget)
620 : InstARM32(Func, InstARM32::Call, 1, Dest) { 637 : InstARM32(Func, InstARM32::Call, 1, Dest) {
621 HasSideEffects = true; 638 HasSideEffects = true;
622 addSource(CallTarget); 639 addSource(CallTarget);
623 } 640 }
624 641
625 InstARM32Label::InstARM32Label(Cfg *Func, TargetARM32 *Target) 642 InstARM32Label::InstARM32Label(Cfg *Func, TargetARM32 *Target)
626 : InstARM32(Func, InstARM32::Label, 0, nullptr), 643 : InstARM32(Func, InstARM32::Label, 0, nullptr),
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2171 2188
2172 template class InstARM32FourAddrGPR<InstARM32::Mla>; 2189 template class InstARM32FourAddrGPR<InstARM32::Mla>;
2173 template class InstARM32FourAddrGPR<InstARM32::Mls>; 2190 template class InstARM32FourAddrGPR<InstARM32::Mls>;
2174 2191
2175 template class InstARM32CmpLike<InstARM32::Cmn>; 2192 template class InstARM32CmpLike<InstARM32::Cmn>;
2176 template class InstARM32CmpLike<InstARM32::Cmp>; 2193 template class InstARM32CmpLike<InstARM32::Cmp>;
2177 template class InstARM32CmpLike<InstARM32::Tst>; 2194 template class InstARM32CmpLike<InstARM32::Tst>;
2178 2195
2179 } // end of namespace ARM32 2196 } // end of namespace ARM32
2180 } // end of namespace Ice 2197 } // end of namespace Ice
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