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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 // | 4 // |
| 5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe | 5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe |
| 6 // Please update the (git) revision if we merge changes from Dart. | 6 // Please update the (git) revision if we merge changes from Dart. |
| 7 // https://code.google.com/p/dart/wiki/GettingTheSource | 7 // https://code.google.com/p/dart/wiki/GettingTheSource |
| 8 | 8 |
| 9 #include "vm/globals.h" // NOLINT | 9 #include "vm/globals.h" // NOLINT |
| 10 #if defined(TARGET_ARCH_ARM) | 10 #if defined(TARGET_ARCH_ARM) |
| (...skipping 1051 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1062 | 1062 |
| 1063 | 1063 |
| 1064 void Assembler::vsqrts(SRegister sd, SRegister sm, Condition cond) { | 1064 void Assembler::vsqrts(SRegister sd, SRegister sm, Condition cond) { |
| 1065 EmitVFPsss(cond, B23 | B21 | B20 | B16 | B7 | B6, sd, S0, sm); | 1065 EmitVFPsss(cond, B23 | B21 | B20 | B16 | B7 | B6, sd, S0, sm); |
| 1066 } | 1066 } |
| 1067 | 1067 |
| 1068 void Assembler::vsqrtd(DRegister dd, DRegister dm, Condition cond) { | 1068 void Assembler::vsqrtd(DRegister dd, DRegister dm, Condition cond) { |
| 1069 EmitVFPddd(cond, B23 | B21 | B20 | B16 | B7 | B6, dd, D0, dm); | 1069 EmitVFPddd(cond, B23 | B21 | B20 | B16 | B7 | B6, dd, D0, dm); |
| 1070 } | 1070 } |
| 1071 | 1071 |
| 1072 | 1072 #if 0 |
| 1073 // Moved to ARM32::AssemblerARM32::emitVFPsd |
| 1073 void Assembler::EmitVFPsd(Condition cond, int32_t opcode, | 1074 void Assembler::EmitVFPsd(Condition cond, int32_t opcode, |
| 1074 SRegister sd, DRegister dm) { | 1075 SRegister sd, DRegister dm) { |
| 1075 ASSERT(TargetCPUFeatures::vfp_supported()); | 1076 ASSERT(TargetCPUFeatures::vfp_supported()); |
| 1076 ASSERT(sd != kNoSRegister); | 1077 ASSERT(sd != kNoSRegister); |
| 1077 ASSERT(dm != kNoDRegister); | 1078 ASSERT(dm != kNoDRegister); |
| 1078 ASSERT(cond != kNoCondition); | 1079 ASSERT(cond != kNoCondition); |
| 1079 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | | 1080 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | |
| 1080 B27 | B26 | B25 | B11 | B9 | opcode | | 1081 B27 | B26 | B25 | B11 | B9 | opcode | |
| 1081 ((static_cast<int32_t>(sd) & 1)*B22) | | 1082 ((static_cast<int32_t>(sd) & 1)*B22) | |
| 1082 ((static_cast<int32_t>(sd) >> 1)*B12) | | 1083 ((static_cast<int32_t>(sd) >> 1)*B12) | |
| 1083 ((static_cast<int32_t>(dm) >> 4)*B5) | | 1084 ((static_cast<int32_t>(dm) >> 4)*B5) | |
| 1084 (static_cast<int32_t>(dm) & 0xf); | 1085 (static_cast<int32_t>(dm) & 0xf); |
| 1085 Emit(encoding); | 1086 Emit(encoding); |
| 1086 } | 1087 } |
| 1087 | 1088 |
| 1088 | 1089 // Moved to ARM32::AssemblerARM32::emitVFPds |
| 1089 void Assembler::EmitVFPds(Condition cond, int32_t opcode, | 1090 void Assembler::EmitVFPds(Condition cond, int32_t opcode, |
| 1090 DRegister dd, SRegister sm) { | 1091 DRegister dd, SRegister sm) { |
| 1091 ASSERT(TargetCPUFeatures::vfp_supported()); | 1092 ASSERT(TargetCPUFeatures::vfp_supported()); |
| 1092 ASSERT(dd != kNoDRegister); | 1093 ASSERT(dd != kNoDRegister); |
| 1093 ASSERT(sm != kNoSRegister); | 1094 ASSERT(sm != kNoSRegister); |
| 1094 ASSERT(cond != kNoCondition); | 1095 ASSERT(cond != kNoCondition); |
| 1095 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | | 1096 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | |
| 1096 B27 | B26 | B25 | B11 | B9 | opcode | | 1097 B27 | B26 | B25 | B11 | B9 | opcode | |
| 1097 ((static_cast<int32_t>(dd) >> 4)*B22) | | 1098 ((static_cast<int32_t>(dd) >> 4)*B22) | |
| 1098 ((static_cast<int32_t>(dd) & 0xf)*B12) | | 1099 ((static_cast<int32_t>(dd) & 0xf)*B12) | |
| 1099 ((static_cast<int32_t>(sm) & 1)*B5) | | 1100 ((static_cast<int32_t>(sm) & 1)*B5) | |
| 1100 (static_cast<int32_t>(sm) >> 1); | 1101 (static_cast<int32_t>(sm) >> 1); |
| 1101 Emit(encoding); | 1102 Emit(encoding); |
| 1102 } | 1103 } |
| 1103 | 1104 |
| 1104 | 1105 // Moved to ARM32::AssemblerARM32::vcvtsd(). |
| 1105 void Assembler::vcvtsd(SRegister sd, DRegister dm, Condition cond) { | 1106 void Assembler::vcvtsd(SRegister sd, DRegister dm, Condition cond) { |
| 1106 EmitVFPsd(cond, B23 | B21 | B20 | B18 | B17 | B16 | B8 | B7 | B6, sd, dm); | 1107 EmitVFPsd(cond, B23 | B21 | B20 | B18 | B17 | B16 | B8 | B7 | B6, sd, dm); |
| 1107 } | 1108 } |
| 1108 | 1109 |
| 1109 | 1110 // Moved to ARM32::AssemblerARM32::vcvtds(). |
| 1110 void Assembler::vcvtds(DRegister dd, SRegister sm, Condition cond) { | 1111 void Assembler::vcvtds(DRegister dd, SRegister sm, Condition cond) { |
| 1111 EmitVFPds(cond, B23 | B21 | B20 | B18 | B17 | B16 | B7 | B6, dd, sm); | 1112 EmitVFPds(cond, B23 | B21 | B20 | B18 | B17 | B16 | B7 | B6, dd, sm); |
| 1112 } | 1113 } |
| 1114 #endif |
| 1113 | 1115 |
| 1114 | 1116 |
| 1115 void Assembler::vcvtis(SRegister sd, SRegister sm, Condition cond) { | 1117 void Assembler::vcvtis(SRegister sd, SRegister sm, Condition cond) { |
| 1116 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B18 | B16 | B7 | B6, sd, S0, sm); | 1118 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B18 | B16 | B7 | B6, sd, S0, sm); |
| 1117 } | 1119 } |
| 1118 | 1120 |
| 1119 | 1121 |
| 1120 void Assembler::vcvtid(SRegister sd, DRegister dm, Condition cond) { | 1122 void Assembler::vcvtid(SRegister sd, DRegister dm, Condition cond) { |
| 1121 EmitVFPsd(cond, B23 | B21 | B20 | B19 | B18 | B16 | B8 | B7 | B6, sd, dm); | 1123 EmitVFPsd(cond, B23 | B21 | B20 | B19 | B18 | B16 | B8 | B7 | B6, sd, dm); |
| 1122 } | 1124 } |
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| 3687 | 3689 |
| 3688 | 3690 |
| 3689 const char* Assembler::FpuRegisterName(FpuRegister reg) { | 3691 const char* Assembler::FpuRegisterName(FpuRegister reg) { |
| 3690 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); | 3692 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); |
| 3691 return fpu_reg_names[reg]; | 3693 return fpu_reg_names[reg]; |
| 3692 } | 3694 } |
| 3693 | 3695 |
| 3694 } // namespace dart | 3696 } // namespace dart |
| 3695 | 3697 |
| 3696 #endif // defined TARGET_ARCH_ARM | 3698 #endif // defined TARGET_ARCH_ARM |
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