| Index: tests_lit/assembler/arm32/vcmp.ll
|
| diff --git a/tests_lit/assembler/arm32/vcmp.ll b/tests_lit/assembler/arm32/vcmp.ll
|
| new file mode 100644
|
| index 0000000000000000000000000000000000000000..c1d12360deefa11fea0a1fab6bb8ad8946e54a99
|
| --- /dev/null
|
| +++ b/tests_lit/assembler/arm32/vcmp.ll
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| @@ -0,0 +1,98 @@
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| +; Show that we know how to translate vcmp.
|
| +
|
| +; REQUIRES: allow_dump
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| +
|
| +; TODO(kschimpf): Use include registers for compare instructions, so that the
|
| +; test is less brittle.
|
| +
|
| +; Compile using standalone assembler.
|
| +; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \
|
| +; RUN: | FileCheck %s --check-prefix=ASM
|
| +
|
| +; Show bytes in assembled standalone code.
|
| +; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \
|
| +; RUN: --args -Om1 | FileCheck %s --check-prefix=DIS
|
| +
|
| +; Compile using integrated assembler.
|
| +; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \
|
| +; RUN: | FileCheck %s --check-prefix=IASM
|
| +
|
| +; Show bytes in assembled integrated code.
|
| +; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
|
| +; RUN: --args -Om1 | FileCheck %s --check-prefix=DIS
|
| +
|
| +define internal i32 @vcmpFloat(float %v1, float %v2) {
|
| +; ASM-LABEL: vcmpFloat:
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| +; DIS-LABEL: 00000000 <vcmpFloat>:
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| +; IASM-LABEL: vcmpFloat:
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| +
|
| +entry:
|
| +; ASM-NEXT: .LvcmpFloat$entry:
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| +; IASM-NEXT: .LvcmpFloat$entry:
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| +
|
| + %cmp = fcmp olt float %v1, %v2
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| +
|
| +; ASM: vcmp.f32 s0, s1
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| +; DIS: 14: eeb40a60
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| +; IASM-NOT: vcmp
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| +
|
| + %res = zext i1 %cmp to i32
|
| + ret i32 %res
|
| +}
|
| +
|
| +define internal i32 @vcmpFloatToZero(float %v) {
|
| +; ASM-LABEL: vcmpFloatToZero:
|
| +; DIS-LABEL: 00000040 <vcmpFloatToZero>:
|
| +; IASM-LABEL: vcmpFloatToZero:
|
| +
|
| +entry:
|
| +; ASM-NEXT: .LvcmpFloatToZero$entry:
|
| +; IASM-NEXT: .LvcmpFloatToZero$entry:
|
| +
|
| + %cmp = fcmp olt float %v, 0.0
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| +
|
| +; ASM: vcmp.f32 s0, #0.0
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| +; DIS: 4c: eeb50a40
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| +; IASM-NOT: vcmp
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| +
|
| + %res = zext i1 %cmp to i32
|
| + ret i32 %res
|
| +}
|
| +
|
| +define internal i32 @vcmpDouble(double %v1, double %v2) {
|
| +; ASM-LABEL: vcmpDouble:
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| +; DIS-LABEL: 00000080 <vcmpDouble>:
|
| +; IASM-LABEL: vcmpDouble:
|
| +
|
| +entry:
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| +; ASM-NEXT: .LvcmpDouble$entry:
|
| +; IASM-NEXT: .LvcmpDouble$entry:
|
| +
|
| + %cmp = fcmp olt double %v1, %v2
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| +
|
| +; ASM: vcmp.f64 d31, d30
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| +; DIS: 94: eef4fb6e
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| +; IASM-NOT: vcmp
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| +
|
| + %res = zext i1 %cmp to i32
|
| + ret i32 %res
|
| +}
|
| +
|
| +define internal i32 @vcmpDoubleToZero(double %v) {
|
| +; ASM-LABEL: vcmpDoubleToZero:
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| +; DIS-LABEL: 000000c0 <vcmpDoubleToZero>:
|
| +; IASM-LABEL: vcmpDoubleToZero:
|
| +
|
| +entry:
|
| +; ASM-NEXT: .LvcmpDoubleToZero$entry:
|
| +; IASM-NEXT: .LvcmpDoubleToZero$entry:
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| +
|
| + %cmp = fcmp olt double %v, 0.0
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| +
|
| +; ASM: vcmp.f64 d31, #0.0
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| +; DIS: cc: eef5fb40
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| +; IASM-NOT: vcmp
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| +
|
| + %res = zext i1 %cmp to i32
|
| + ret i32 %res
|
| +}
|
|
|