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1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// | 1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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1857 Ostream &Str = Func->getContext()->getStrEmit(); | 1857 Ostream &Str = Func->getContext()->getStrEmit(); |
1858 assert(getSrcSize() == 2); | 1858 assert(getSrcSize() == 2); |
1859 Str << "\t" | 1859 Str << "\t" |
1860 "vcmp" << getPredicate() << getVecWidthString(getSrc(0)->getType()) | 1860 "vcmp" << getPredicate() << getVecWidthString(getSrc(0)->getType()) |
1861 << "\t"; | 1861 << "\t"; |
1862 getSrc(0)->emit(Func); | 1862 getSrc(0)->emit(Func); |
1863 Str << ", "; | 1863 Str << ", "; |
1864 getSrc(1)->emit(Func); | 1864 getSrc(1)->emit(Func); |
1865 } | 1865 } |
1866 | 1866 |
| 1867 void InstARM32Vcmp::emitIAS(const Cfg *Func) const { |
| 1868 assert(getSrcSize() == 2); |
| 1869 const Operand *Src0 = getSrc(0); |
| 1870 const Type Ty = Src0->getType(); |
| 1871 const Operand *Src1 = getSrc(1); |
| 1872 const CondARM32::Cond Cond = getPredicate(); |
| 1873 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); |
| 1874 if (llvm::isa<OperandARM32FlexFpZero>(Src1)) { |
| 1875 switch (Ty) { |
| 1876 case IceType_f32: |
| 1877 Asm->vcmpsz(Src0, Cond); |
| 1878 break; |
| 1879 case IceType_f64: |
| 1880 Asm->vcmpdz(Src0, Cond); |
| 1881 break; |
| 1882 default: |
| 1883 llvm::report_fatal_error("Vcvt on non floating value"); |
| 1884 } |
| 1885 } else { |
| 1886 switch (Ty) { |
| 1887 case IceType_f32: |
| 1888 Asm->vcmps(Src0, Src1, Cond); |
| 1889 break; |
| 1890 case IceType_f64: |
| 1891 Asm->vcmpd(Src0, Src1, Cond); |
| 1892 break; |
| 1893 default: |
| 1894 llvm::report_fatal_error("Vcvt on non floating value"); |
| 1895 } |
| 1896 } |
| 1897 assert(!Asm->needsTextFixup()); |
| 1898 } |
| 1899 |
1867 void InstARM32Vcmp::dump(const Cfg *Func) const { | 1900 void InstARM32Vcmp::dump(const Cfg *Func) const { |
1868 if (!BuildDefs::dump()) | 1901 if (!BuildDefs::dump()) |
1869 return; | 1902 return; |
1870 Ostream &Str = Func->getContext()->getStrDump(); | 1903 Ostream &Str = Func->getContext()->getStrDump(); |
1871 Str << "vcmp" << getPredicate() << getVecWidthString(getSrc(0)->getType()); | 1904 Str << "vcmp" << getPredicate() << getVecWidthString(getSrc(0)->getType()); |
1872 dumpSources(Func); | 1905 dumpSources(Func); |
1873 } | 1906 } |
1874 | 1907 |
1875 void InstARM32Vmrs::emit(const Cfg *Func) const { | 1908 void InstARM32Vmrs::emit(const Cfg *Func) const { |
1876 if (!BuildDefs::dump()) | 1909 if (!BuildDefs::dump()) |
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2183 | 2216 |
2184 template class InstARM32FourAddrGPR<InstARM32::Mla>; | 2217 template class InstARM32FourAddrGPR<InstARM32::Mla>; |
2185 template class InstARM32FourAddrGPR<InstARM32::Mls>; | 2218 template class InstARM32FourAddrGPR<InstARM32::Mls>; |
2186 | 2219 |
2187 template class InstARM32CmpLike<InstARM32::Cmn>; | 2220 template class InstARM32CmpLike<InstARM32::Cmn>; |
2188 template class InstARM32CmpLike<InstARM32::Cmp>; | 2221 template class InstARM32CmpLike<InstARM32::Cmp>; |
2189 template class InstARM32CmpLike<InstARM32::Tst>; | 2222 template class InstARM32CmpLike<InstARM32::Tst>; |
2190 | 2223 |
2191 } // end of namespace ARM32 | 2224 } // end of namespace ARM32 |
2192 } // end of namespace Ice | 2225 } // end of namespace Ice |
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