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Side by Side Diff: src/IceAssemblerARM32.h

Issue 1564393002: Add VCMP{s,sz,d,dz} Instructions to ARM integrated assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix nits and simplify test. Created 4 years, 11 months ago
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1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===//
2 // 2 //
3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
4 // for details. All rights reserved. Use of this source code is governed by a 4 // for details. All rights reserved. Use of this source code is governed by a
5 // BSD-style license that can be found in the LICENSE file. 5 // BSD-style license that can be found in the LICENSE file.
6 // 6 //
7 // Modified by the Subzero authors. 7 // Modified by the Subzero authors.
8 // 8 //
9 //===----------------------------------------------------------------------===// 9 //===----------------------------------------------------------------------===//
10 // 10 //
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317 317
318 // Implements uxtb/uxth depending on type of OpSrc0. 318 // Implements uxtb/uxth depending on type of OpSrc0.
319 void uxt(const Operand *OpRd, const Operand *OpSrc0, CondARM32::Cond Cond); 319 void uxt(const Operand *OpRd, const Operand *OpSrc0, CondARM32::Cond Cond);
320 320
321 void vaddd(const Operand *OpDd, const Operand *OpDn, const Operand *OpDm, 321 void vaddd(const Operand *OpDd, const Operand *OpDn, const Operand *OpDm,
322 CondARM32::Cond Cond); 322 CondARM32::Cond Cond);
323 323
324 void vadds(const Operand *OpSd, const Operand *OpSn, const Operand *OpSm, 324 void vadds(const Operand *OpSd, const Operand *OpSn, const Operand *OpSm,
325 CondARM32::Cond Cond); 325 CondARM32::Cond Cond);
326 326
327 void vcmpd(const Operand *OpDd, const Operand *OpDm, CondARM32::Cond cond);
328
329 // Second argument of comare is zero (+0.0).
Jim Stichnoth 2016/01/11 17:27:03 compare
Karl 2016/01/11 18:12:33 Done.
330 void vcmpdz(const Operand *OpDd, CondARM32::Cond cond);
331
332 void vcmps(const Operand *OpSd, const Operand *OpSm, CondARM32::Cond cond);
333
334 // Second argument of comare is zero (+0.0).
335 void vcmpsz(const Operand *OpSd, CondARM32::Cond cond);
336
327 void vcvtsd(const Operand *OpSd, const Operand *OpDm, CondARM32::Cond Cond); 337 void vcvtsd(const Operand *OpSd, const Operand *OpDm, CondARM32::Cond Cond);
328 338
329 void vcvtds(const Operand *OpDd, const Operand *OpSm, CondARM32::Cond Cond); 339 void vcvtds(const Operand *OpDd, const Operand *OpSm, CondARM32::Cond Cond);
330 340
331 void vdivd(const Operand *OpDd, const Operand *OpDn, const Operand *OpDm, 341 void vdivd(const Operand *OpDd, const Operand *OpDn, const Operand *OpDm,
332 CondARM32::Cond Cond); 342 CondARM32::Cond Cond);
333 343
334 void vdivs(const Operand *OpSd, const Operand *OpSn, const Operand *OpSm, 344 void vdivs(const Operand *OpSd, const Operand *OpSn, const Operand *OpSm,
335 CondARM32::Cond Cond); 345 CondARM32::Cond Cond);
336 346
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510 520
511 // Emit VFP instruction with 3 S registers. 521 // Emit VFP instruction with 3 S registers.
512 void emitVFPsss(CondARM32::Cond Cond, IValueT Opcode, IValueT Sd, IValueT Sn, 522 void emitVFPsss(CondARM32::Cond Cond, IValueT Opcode, IValueT Sd, IValueT Sn,
513 IValueT Sm); 523 IValueT Sm);
514 }; 524 };
515 525
516 } // end of namespace ARM32 526 } // end of namespace ARM32
517 } // end of namespace Ice 527 } // end of namespace Ice
518 528
519 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H 529 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H
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