Treat R19 is a C preserved register, fixing crashing on Linux ARM64.

runtime/vm/constants_arm64.h

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_CONSTANTS_ARM64_H_
 #define VM_CONSTANTS_ARM64_H_
 
 #include "platform/assert.h"
 
 namespace dart {
 
 enum Register {
   R0  =  0,
   R1  =  1,
   R2  =  2,
   R3  =  3,
   R4  =  4,
   R5  =  5,
   R6  =  6,
   R7  =  7,
   R8  =  8,
   R9  =  9,
   R10 = 10,
   R11 = 11,
   R12 = 12,
   R13 = 13,
   R14 = 14,
-  R15 = 15,
+  R15 = 15,  // SP in Dart code.
   R16 = 16,  // IP0 aka TMP
   R17 = 17,  // IP1 aka TMP2
   R18 = 18,  // "platform register" on iOS.
-  R19 = 19,  // SP in Dart code.
+  R19 = 19,
   R20 = 20,  // THR

[regis, 2016/01/07 09:16:21]

R20 now looks lonely in the middle of the R19-R28 callee-saved range. You could
consider using R19 as the THR register and mark it here as
// THR and first callee-saved register.
Even better, using consecutive callee-saved registers for our Dart needs would
make R26 our THR register.
But that is not important.

[rmacnak, 2016/01/07 17:05:48]

Yes, I like that better. I'll do it in a separate CL.

   R21 = 21,
   R22 = 22,
   R23 = 23,
   R24 = 24,
   R25 = 25,
   R26 = 26,
   R27 = 27,  // PP
   R28 = 28,  // CTX
   R29 = 29,  // FP
   R30 = 30,  // LR
   R31 = 31,  // ZR, CSP
   kNumberOfCpuRegisters = 32,
   kNoRegister = -1,
 
   // These registers both use the encoding R31, but to avoid mistakes we give
   // them different values, and then translate before encoding.
   CSP = 32,
   ZR = 33,
 
   // Aliases.
   IP0 = R16,
   IP1 = R17,
-  SP = R19,
+  SP = R15,
   FP = R29,
   LR = R30,
 };
 
 
 enum VRegister {
   V0  =  0,
   V1  =  1,
   V2  =  2,
   V3  =  3,
@@ skipping 38 matching lines @@
 const int kNumberOfFpuRegisters = kNumberOfVRegisters;
 const FpuRegister kNoFpuRegister = kNoVRegister;
 
 // Register aliases.
 const Register TMP = R16;  // Used as scratch register by assembler.
 const Register TMP2 = R17;
 const Register CTX = R28;  // Location of current context at method entry.
 const Register PP = R27;  // Caches object pool pointer in generated code.
 const Register CODE_REG = R24;
 const Register FPREG = FP;  // Frame pointer register.
-const Register SPREG = R19;  // Stack pointer register.
+const Register SPREG = R15;  // Stack pointer register.
 const Register LRREG = LR;  // Link register.
 const Register ICREG = R5;  // IC data register.
 const Register ARGS_DESC_REG = R4;  // Arguments descriptor register.
 const Register THR = R20;  // Caches current thread in generated code.
 
 
 // Exception object is passed in this register to the catch handlers when an
 // exception is thrown.
 const Register kExceptionObjectReg = R0;
 
@@ skipping 10 matching lines @@
 // List of registers used in load/store multiple.
 typedef uint32_t RegList;
 const RegList kAllCpuRegistersList = 0xFFFF;
 
 
 // C++ ABI call registers.
 const RegList kAbiArgumentCpuRegs =
     (1 << R0) | (1 << R1) | (1 << R2) | (1 << R3) |
     (1 << R4) | (1 << R5) | (1 << R6) | (1 << R7);
 const RegList kAbiPreservedCpuRegs =
-    (1 << R20) | (1 << R21) | (1 << R22) | (1 << R23) |
-    (1 << R24) | (1 << R25) | (1 << R26) | (1 << R27) |
-    (1 << R28);
-const Register kAbiFirstPreservedCpuReg = R20;
+    (1 << R19) | (1 << R20) | (1 << R21) | (1 << R22) |
+    (1 << R23) | (1 << R24) | (1 << R25) | (1 << R26) |
+    (1 << R27) | (1 << R28);
+const Register kAbiFirstPreservedCpuReg = R19;
 const Register kAbiLastPreservedCpuReg = R28;
-const int kAbiPreservedCpuRegCount = 9;
+const int kAbiPreservedCpuRegCount = 10;
 const VRegister kAbiFirstPreservedFpuReg = V8;
 const VRegister kAbiLastPreservedFpuReg = V15;
 const int kAbiPreservedFpuRegCount = 8;
 
 const intptr_t kReservedCpuRegisters =
     (1 << SPREG) |  // Dart SP
     (1 << FPREG) |
     (1 << TMP)   |
     (1 << TMP2)  |
     (1 << PP)    |
     (1 << THR)   |
     (1 << LR)    |
     (1 << R31)   |  // C++ SP
     (1 << CTX)   |
     (1 << R18);     // iOS platform register.
                     // TODO(rmacnak): Only reserve on Mac & iOS.
 // CPU registers available to Dart allocator.
 const RegList kDartAvailableCpuRegs =
     kAllCpuRegistersList & ~kReservedCpuRegisters;
 // Registers available to Dart that are not preserved by runtime calls.
 const RegList kDartVolatileCpuRegs =
     kDartAvailableCpuRegs & ~kAbiPreservedCpuRegs;
 const Register kDartFirstVolatileCpuReg = R0;
-const Register kDartLastVolatileCpuReg = R15;
-const int kDartVolatileCpuRegCount = 16;
+const Register kDartLastVolatileCpuReg = R14;
+const int kDartVolatileCpuRegCount = 15;
 const int kDartVolatileFpuRegCount = 24;
 
 static inline Register ConcreteRegister(Register r) {
   return ((r == ZR) || (r == CSP)) ? R31 : r;
 }
 
 // Values for the condition field as defined in section A3.2.
 enum Condition {
   kNoCondition = -1,
   EQ =  0,  // equal
@@ skipping 887 matching lines @@
   static Instr* At(uword pc) { return reinterpret_cast<Instr*>(pc); }
 
  private:
   DISALLOW_ALLOCATION();
   DISALLOW_IMPLICIT_CONSTRUCTORS(Instr);
 };
 
 }  // namespace dart
 
 #endif  // VM_CONSTANTS_ARM64_H_