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Issue 1552483002: MIPS: [turbofan] Improve matching for And(Shr(x, imm), mask). (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Remove wrong matching. Created 4 years, 11 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <limits.h> 5 #include <limits.h>
6 #include <stdarg.h> 6 #include <stdarg.h>
7 #include <stdlib.h> 7 #include <stdlib.h>
8 #include <cmath> 8 #include <cmath>
9 9
10 #if V8_TARGET_ARCH_MIPS64 10 #if V8_TARGET_ARCH_MIPS64
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3872 // Interpret rd field as 5-bit msb of extract. 3872 // Interpret rd field as 5-bit msb of extract.
3873 uint16_t msb = rd_reg(); 3873 uint16_t msb = rd_reg();
3874 // Interpret sa field as 5-bit lsb of extract. 3874 // Interpret sa field as 5-bit lsb of extract.
3875 uint16_t lsb = sa(); 3875 uint16_t lsb = sa();
3876 uint16_t size = msb + 1; 3876 uint16_t size = msb + 1;
3877 uint64_t mask = (1ULL << size) - 1; 3877 uint64_t mask = (1ULL << size) - 1;
3878 alu_out = static_cast<int64_t>((rs_u() & (mask << lsb)) >> lsb); 3878 alu_out = static_cast<int64_t>((rs_u() & (mask << lsb)) >> lsb);
3879 SetResult(rt_reg(), alu_out); 3879 SetResult(rt_reg(), alu_out);
3880 break; 3880 break;
3881 } 3881 }
3882 case DEXTM: {
3883 // Interpret rd field as 5-bit msb of extract.
3884 uint16_t msb = rd_reg();
3885 // Interpret sa field as 5-bit lsb of extract.
3886 uint16_t lsb = sa();
3887 uint16_t size = msb + 33;
3888 uint64_t mask = (1ULL << size) - 1;
3889 alu_out = static_cast<int64_t>((rs_u() & (mask << lsb)) >> lsb);
3890 SetResult(rt_reg(), alu_out);
3891 break;
3892 }
3893 case DEXTU: {
3894 // Interpret rd field as 5-bit msb of extract.
3895 uint16_t msb = rd_reg();
3896 // Interpret sa field as 5-bit lsb of extract.
3897 uint16_t lsb = sa() + 32;
3898 uint16_t size = msb + 1;
3899 uint64_t mask = (1ULL << size) - 1;
3900 alu_out = static_cast<int64_t>((rs_u() & (mask << lsb)) >> lsb);
3901 SetResult(rt_reg(), alu_out);
3902 break;
3903 }
3882 case BSHFL: { 3904 case BSHFL: {
3883 int32_t sa = get_instr()->SaFieldRaw() >> kSaShift; 3905 int32_t sa = get_instr()->SaFieldRaw() >> kSaShift;
3884 switch (sa) { 3906 switch (sa) {
3885 case BITSWAP: { 3907 case BITSWAP: {
3886 uint32_t input = static_cast<uint32_t>(rt()); 3908 uint32_t input = static_cast<uint32_t>(rt());
3887 uint32_t output = 0; 3909 uint32_t output = 0;
3888 uint8_t i_byte, o_byte; 3910 uint8_t i_byte, o_byte;
3889 3911
3890 // Reverse the bit in byte for each individual byte 3912 // Reverse the bit in byte for each individual byte
3891 for (int i = 0; i < 4; i++) { 3913 for (int i = 0; i < 4; i++) {
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4740 } 4762 }
4741 4763
4742 4764
4743 #undef UNSUPPORTED 4765 #undef UNSUPPORTED
4744 } // namespace internal 4766 } // namespace internal
4745 } // namespace v8 4767 } // namespace v8
4746 4768
4747 #endif // USE_SIMULATOR 4769 #endif // USE_SIMULATOR
4748 4770
4749 #endif // V8_TARGET_ARCH_MIPS64 4771 #endif // V8_TARGET_ARCH_MIPS64
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