Subzero. Refactoring.

src/IceTargetLoweringMIPS32.cpp

 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 12 matching lines @@
 #include "IceGlobalInits.h"
 #include "IceInstMIPS32.h"
 #include "IceLiveness.h"
 #include "IceOperand.h"
 #include "IcePhiLoweringImpl.h"
 #include "IceRegistersMIPS32.h"
 #include "IceTargetLoweringMIPS32.def"
 #include "IceUtils.h"
 #include "llvm/Support/MathExtras.h"
 
+namespace MIPS32 {
+std::unique_ptr<::Ice::TargetLowering> createTargetLowering(::Ice::Cfg *Func) {
+  return ::Ice::TargetMIPS32::create(Func);
+}
+
+std::unique_ptr<::Ice::TargetDataLowering>
+createTargetDataLowering(::Ice::GlobalContext *Ctx) {
+  return ::Ice::TargetDataMIPS32::create(Ctx);
+}
+
+std::unique_ptr<::Ice::TargetHeaderLowering>
+createTargetHeaderLowering(::Ice::GlobalContext *Ctx) {
+  return ::Ice::TargetHeaderMIPS32::create(Ctx);
+}
+
+void staticInit() { ::Ice::TargetMIPS32::staticInit(); }
+} // end of namespace MIPS32
+
 namespace Ice {
 
 using llvm::isInt;
 
 namespace {
 
 // The maximum number of arguments to pass in GPR registers.
 constexpr uint32_t MIPS32_MAX_GPR_ARG = 4;
 
 } // end of anonymous namespace
@@ skipping 1033 matching lines @@
       << "nomicromips\n";
   Str << "\t.set\t"
       << "nomips16\n";
 }
 
 llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[IceType_NUM];
 llvm::SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
 llvm::SmallBitVector TargetMIPS32::ScratchRegs;
 
 } // end of namespace Ice