Subzero. Code organization.

src/IceTargetLoweringX8664Traits.h

 //===- subzero/src/IceTargetLoweringX8664Traits.h - x86-64 traits -*- C++ -*-=//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 13 matching lines @@
 #include "IceRegistersX8664.h"
 #include "IceTargetLowering.h"
 #include "IceTargetLoweringX8664.def"
 #include "IceTargetLoweringX86RegClass.h"
 
 #include <array>
 #include <initializer_list>
 
 namespace Ice {
 
+namespace X8664 {
+using namespace ::Ice::X86;
+
+template <class TraitsType> class AssemblerX86Base;
+template <class TraitsType> struct Insts;
+template <class TraitsType> class TargetX86Base;
+
 class TargetX8664;
 
-namespace X8664 {
-class AssemblerX8664;
-} // end of namespace X8664
-
-namespace X86Internal {
-
-template <class Machine> struct Insts;
-template <class Machine> struct MachineTraits;
-template <class Machine> class TargetX86Base;
-
-template <> struct MachineTraits<TargetX8664> {
+struct TargetX8664Traits {
   //----------------------------------------------------------------------------
   //     ______  ______  __    __
   //    /\  __ \/\  ___\/\ "-./  \
   //    \ \  __ \ \___  \ \ \-./\ \
   //     \ \_\ \_\/\_____\ \_\ \ \_\
   //      \/_/\/_/\/_____/\/_/  \/_/
   //
   //----------------------------------------------------------------------------
+  static constexpr ::Ice::Assembler::AssemblerKind AsmKind =
+      ::Ice::Assembler::Asm_X8632;
+
   static constexpr bool Is64Bit = true;
   static constexpr bool HasPopa = false;
   static constexpr bool HasPusha = false;
   static constexpr bool UsesX87 = false;
   static constexpr ::Ice::RegX8664::GPRRegister Last8BitGPR =
       ::Ice::RegX8664::GPRRegister::Encoded_Reg_r15d;
 
   enum ScaleFactor { TIMES_1 = 0, TIMES_2 = 1, TIMES_4 = 2, TIMES_8 = 3 };
 
   using GPRRegister = ::Ice::RegX8664::GPRRegister;
@@ skipping 119 matching lines @@
 
     /// Returns whether or not this operand is really the given register in
     /// disguise. Used from the assembler to generate better encodings.
     bool IsRegister(GPRRegister reg) const {
       return ((encoding_[0] & 0xF8) ==
               0xC0) // Addressing mode is register only.
              &&
              (rm() == reg); // Register codes match.
     }
 
-    template <class> friend class AssemblerX86Base;
+    friend class AssemblerX86Base<TargetX8664Traits>;
   };
 
   class Address : public Operand {
     Address() = delete;
 
   public:
     Address(const Address &other) : Operand(other) {}
 
     Address &operator=(const Address &other) {
       Operand::operator=(other);
@@ skipping 589 matching lines @@
   static const size_t TableTypeX8664AttributesSize;
 
   //----------------------------------------------------------------------------
   //      __  __   __  ______  ______
   //    /\ \/\ "-.\ \/\  ___\/\__  _\
   //    \ \ \ \ \-.  \ \___  \/_/\ \/
   //     \ \_\ \_\\"\_\/\_____\ \ \_\
   //      \/_/\/_/ \/_/\/_____/  \/_/
   //
   //----------------------------------------------------------------------------
-  using Insts = ::Ice::X86Internal::Insts<TargetX8664>;
+  using Traits = TargetX8664Traits;
+  using Insts = ::Ice::X8664::Insts<Traits>;
 
-  using TargetLowering = ::Ice::X86Internal::TargetX86Base<TargetX8664>;
-  using Assembler = X8664::AssemblerX8664;
+  using TargetLowering = ::Ice::X8664::TargetX86Base<Traits>;
+  using ConcreteTarget = ::Ice::X8664::TargetX8664;
+  using Assembler = ::Ice::X8664::AssemblerX86Base<Traits>;
 
   /// X86Operand extends the Operand hierarchy. Its subclasses are X86OperandMem
   /// and VariableSplit.
   class X86Operand : public ::Ice::Operand {
     X86Operand() = delete;
     X86Operand(const X86Operand &) = delete;
     X86Operand &operator=(const X86Operand &) = delete;
 
   public:
     enum OperandKindX8664 { k__Start = ::Ice::Operand::kTarget, kMem, kSplit };
@@ skipping 147 matching lines @@
     const char *CvtString;   // i (integer), s (single FP), d (double FP)
     const char *SdSsString;  // ss, sd, or <blank>
     const char *PdPsString;  // ps, pd, or <blank>
     const char *SpSdString;  // ss, sd, ps, pd, or <blank>
     const char *PackString;  // b, w, d, or <blank>
     const char *WidthString; // b, w, l, q, or <blank>
     const char *FldString;   // s, l, or <blank>
   } TypeAttributes[];
 };
 
-} // end of namespace X86Internal
-
-namespace X8664 {
-using Traits = ::Ice::X86Internal::MachineTraits<TargetX8664>;
+using Traits = ::Ice::X8664::TargetX8664Traits;
 } // end of namespace X8664
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8664TRAITS_H