Subzero. Code organization.

src/IceInstARM32.cpp

 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
 /// \brief Implements the InstARM32 and OperandARM32 classes, primarily the
 /// constructors and the dump()/emit() methods.
 ///
 //===----------------------------------------------------------------------===//
 
 #include "IceInstARM32.h"
 
 #include "IceAssemblerARM32.h"
 #include "IceCfg.h"
 #include "IceCfgNode.h"
 #include "IceInst.h"
 #include "IceOperand.h"
 #include "IceRegistersARM32.h"
 #include "IceTargetLoweringARM32.h"
 
 namespace Ice {
+namespace ARM32 {
 
 namespace {
 
 // maximum number of registers allowed in vpush/vpop.
 static constexpr SizeT VpushVpopMaxConsecRegs = 16;
 
 const struct TypeARM32Attributes_ {
   const char *WidthString;    // b, h, <blank>, or d
   const char *VecWidthString; // i8, i16, i32, f32, f64
   int8_t SExtAddrOffsetBits;
@@ skipping 2107 matching lines @@
 template class InstARM32UnaryopGPR<InstARM32::Uxt, true>;
 template class InstARM32UnaryopFP<InstARM32::Vsqrt>;
 
 template class InstARM32FourAddrGPR<InstARM32::Mla>;
 template class InstARM32FourAddrGPR<InstARM32::Mls>;
 
 template class InstARM32CmpLike<InstARM32::Cmn>;
 template class InstARM32CmpLike<InstARM32::Cmp>;
 template class InstARM32CmpLike<InstARM32::Tst>;
 
+} // end of namespace ARM32
 } // end of namespace Ice