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Side by Side Diff: src/IceTargetLoweringX8664Traits.h

Issue 1546373003: Subzero. X86. Refactors initRegisterSet. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fixes x86 regressions Created 4 years, 11 months ago
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1 //===- subzero/src/IceTargetLoweringX8664Traits.h - x86-64 traits -*- C++ -*-=// 1 //===- subzero/src/IceTargetLoweringX8664Traits.h - x86-64 traits -*- C++ -*-=//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
11 /// \brief Declares the X8664 Target Lowering Traits. 11 /// \brief Declares the X8664 Target Lowering Traits.
12 /// 12 ///
13 //===----------------------------------------------------------------------===// 13 //===----------------------------------------------------------------------===//
14 14
15 #ifndef SUBZERO_SRC_ICETARGETLOWERINGX8664TRAITS_H 15 #ifndef SUBZERO_SRC_ICETARGETLOWERINGX8664TRAITS_H
16 #define SUBZERO_SRC_ICETARGETLOWERINGX8664TRAITS_H 16 #define SUBZERO_SRC_ICETARGETLOWERINGX8664TRAITS_H
17 17
18 #include "IceAssembler.h" 18 #include "IceAssembler.h"
19 #include "IceConditionCodesX8664.h" 19 #include "IceConditionCodesX8664.h"
20 #include "IceDefs.h" 20 #include "IceDefs.h"
21 #include "IceInst.h" 21 #include "IceInst.h"
22 #include "IceInstX8664.def" 22 #include "IceInstX8664.def"
23 #include "IceOperand.h" 23 #include "IceOperand.h"
24 #include "IceRegistersX8664.h" 24 #include "IceRegistersX8664.h"
25 #include "IceTargetLowering.h" 25 #include "IceTargetLowering.h"
26 #include "IceTargetLoweringX8664.def" 26 #include "IceTargetLoweringX8664.def"
27 #include "IceTargetLoweringX86RegClass.h" 27 #include "IceTargetLoweringX86RegClass.h"
28 28
29 #include <array> 29 #include <array>
30 #include <initializer_list>
30 31
31 namespace Ice { 32 namespace Ice {
32 33
33 class TargetX8664; 34 class TargetX8664;
34 35
35 namespace X8664 { 36 namespace X8664 {
36 class AssemblerX8664; 37 class AssemblerX8664;
37 } // end of namespace X8664 38 } // end of namespace X8664
38 39
39 namespace X86Internal { 40 namespace X86Internal {
(...skipping 249 matching lines...) Expand 10 before | Expand all | Expand 10 after
289 // SSE2 is the PNaCl baseline instruction set. 290 // SSE2 is the PNaCl baseline instruction set.
290 SSE2 = Begin, 291 SSE2 = Begin,
291 SSE4_1, 292 SSE4_1,
292 End 293 End
293 }; 294 };
294 295
295 static const char *TargetName; 296 static const char *TargetName;
296 static constexpr Type WordType = IceType_i64; 297 static constexpr Type WordType = IceType_i64;
297 298
298 static IceString getRegName(int32_t RegNum) { 299 static IceString getRegName(int32_t RegNum) {
299 static const char *const RegNames[] = { 300 static const char *const RegNames[RegisterSet::Reg_NUM] = {
300 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \ 301 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
301 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \ 302 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
302 isTrunc8Rcvr, isAhRcvr, aliases) \ 303 isTrunc8Rcvr, isAhRcvr, aliases) \
303 name, 304 name,
304 REGX8664_TABLE 305 REGX8664_TABLE
305 #undef X 306 #undef X
306 }; 307 };
307 assert(RegNum >= 0); 308 assert(RegNum >= 0);
308 assert(RegNum < RegisterSet::Reg_NUM); 309 assert(RegNum < RegisterSet::Reg_NUM);
309 return RegNames[RegNum]; 310 return RegNames[RegNum];
310 } 311 }
311 312
312 static GPRRegister getEncodedGPR(int32_t RegNum) { 313 static GPRRegister getEncodedGPR(int32_t RegNum) {
313 static const GPRRegister GPRRegs[] = { 314 static const GPRRegister GPRRegs[RegisterSet::Reg_NUM] = {
314 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \ 315 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
315 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \ 316 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
316 isTrunc8Rcvr, isAhRcvr, aliases) \ 317 isTrunc8Rcvr, isAhRcvr, aliases) \
317 GPRRegister(isGPR ? encode : GPRRegister::Encoded_Not_GPR), 318 GPRRegister(isGPR ? encode : GPRRegister::Encoded_Not_GPR),
318 REGX8664_TABLE 319 REGX8664_TABLE
319 #undef X 320 #undef X
320 }; 321 };
321 assert(RegNum >= 0); 322 assert(RegNum >= 0);
322 assert(RegNum < RegisterSet::Reg_NUM); 323 assert(RegNum < RegisterSet::Reg_NUM);
323 assert(GPRRegs[RegNum] != GPRRegister::Encoded_Not_GPR); 324 assert(GPRRegs[RegNum] != GPRRegister::Encoded_Not_GPR);
324 return GPRRegs[RegNum]; 325 return GPRRegs[RegNum];
325 } 326 }
326 327
327 static ByteRegister getEncodedByteReg(int32_t RegNum) { 328 static ByteRegister getEncodedByteReg(int32_t RegNum) {
328 static const ByteRegister ByteRegs[] = { 329 static const ByteRegister ByteRegs[RegisterSet::Reg_NUM] = {
329 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \ 330 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
330 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \ 331 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
331 isTrunc8Rcvr, isAhRcvr, aliases) \ 332 isTrunc8Rcvr, isAhRcvr, aliases) \
332 ByteRegister(is8 ? encode : ByteRegister::Encoded_Not_ByteReg), 333 ByteRegister(is8 ? encode : ByteRegister::Encoded_Not_ByteReg),
333 REGX8664_TABLE 334 REGX8664_TABLE
334 #undef X 335 #undef X
335 }; 336 };
336 assert(RegNum >= 0); 337 assert(RegNum >= 0);
337 assert(RegNum < RegisterSet::Reg_NUM); 338 assert(RegNum < RegisterSet::Reg_NUM);
338 assert(ByteRegs[RegNum] != ByteRegister::Encoded_Not_ByteReg); 339 assert(ByteRegs[RegNum] != ByteRegister::Encoded_Not_ByteReg);
339 return ByteRegs[RegNum]; 340 return ByteRegs[RegNum];
340 } 341 }
341 342
342 static XmmRegister getEncodedXmm(int32_t RegNum) { 343 static XmmRegister getEncodedXmm(int32_t RegNum) {
343 static const XmmRegister XmmRegs[] = { 344 static const XmmRegister XmmRegs[RegisterSet::Reg_NUM] = {
344 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \ 345 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
345 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \ 346 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
346 isTrunc8Rcvr, isAhRcvr, aliases) \ 347 isTrunc8Rcvr, isAhRcvr, aliases) \
347 XmmRegister(isXmm ? encode : XmmRegister::Encoded_Not_Xmm), 348 XmmRegister(isXmm ? encode : XmmRegister::Encoded_Not_Xmm),
348 REGX8664_TABLE 349 REGX8664_TABLE
349 #undef X 350 #undef X
350 }; 351 };
351 assert(RegNum >= 0); 352 assert(RegNum >= 0);
352 assert(RegNum < RegisterSet::Reg_NUM); 353 assert(RegNum < RegisterSet::Reg_NUM);
353 assert(XmmRegs[RegNum] != XmmRegister::Encoded_Not_Xmm); 354 assert(XmmRegs[RegNum] != XmmRegister::Encoded_Not_Xmm);
354 return XmmRegs[RegNum]; 355 return XmmRegs[RegNum];
355 } 356 }
356 357
357 static uint32_t getEncoding(int32_t RegNum) { 358 static uint32_t getEncoding(int32_t RegNum) {
358 static const uint32_t Encoding[] = { 359 static const uint32_t Encoding[RegisterSet::Reg_NUM] = {
359 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \ 360 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
360 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \ 361 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
361 isTrunc8Rcvr, isAhRcvr, aliases) \ 362 isTrunc8Rcvr, isAhRcvr, aliases) \
362 encode, 363 encode,
363 REGX8664_TABLE 364 REGX8664_TABLE
364 #undef X 365 #undef X
365 }; 366 };
366 assert(RegNum >= 0); 367 assert(RegNum >= 0);
367 assert(RegNum < RegisterSet::Reg_NUM); 368 assert(RegNum < RegisterSet::Reg_NUM);
368 return Encoding[RegNum]; 369 return Encoding[RegNum];
369 } 370 }
370 371
371 static inline int32_t getBaseReg(int32_t RegNum) { 372 static inline int32_t getBaseReg(int32_t RegNum) {
372 static const int32_t BaseRegs[] = { 373 static const int32_t BaseRegs[RegisterSet::Reg_NUM] = {
373 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \ 374 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
374 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \ 375 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
375 isTrunc8Rcvr, isAhRcvr, aliases) \ 376 isTrunc8Rcvr, isAhRcvr, aliases) \
376 RegisterSet::base, 377 RegisterSet::base,
377 REGX8664_TABLE 378 REGX8664_TABLE
378 #undef X 379 #undef X
379 }; 380 };
380 assert(RegNum >= 0); 381 assert(RegNum >= 0);
381 assert(RegNum < RegisterSet::Reg_NUM); 382 assert(RegNum < RegisterSet::Reg_NUM);
382 return BaseRegs[RegNum]; 383 return BaseRegs[RegNum];
(...skipping 60 matching lines...) Expand 10 before | Expand all | Expand 10 after
443 RegNum - FirstGprWithRegNumSize + FirstGprForType; \ 444 RegNum - FirstGprWithRegNumSize + FirstGprForType; \
444 assert(getBaseReg(RegNum) == getBaseReg(NewRegNum) && \ 445 assert(getBaseReg(RegNum) == getBaseReg(NewRegNum) && \
445 "Error involving " #val); \ 446 "Error involving " #val); \
446 return NewRegNum; \ 447 return NewRegNum; \
447 } 448 }
448 REGX8664_TABLE 449 REGX8664_TABLE
449 #undef X 450 #undef X
450 } 451 }
451 } 452 }
452 453
454 private:
455 /// SizeOf is used to obtain the size of an initializer list as a constexpr
456 /// expression. This is only needed until our C++ library is updated to
457 /// C++ 14 -- which defines constexpr members to std::initializer_list.
458 class SizeOf {
459 SizeOf(const SizeOf &) = delete;
460 SizeOf &operator=(const SizeOf &) = delete;
461
462 public:
463 constexpr SizeOf() : Size(0) {}
464 template <typename... T>
465 explicit constexpr SizeOf(T...)
466 : Size(__length<T...>::value) {}
467 constexpr SizeT size() const { return Size; }
468
469 private:
470 template <typename T, typename... U> struct __length {
471 static constexpr std::size_t value = 1 + __length<U...>::value;
472 };
473
474 template <typename T> struct __length<T> {
475 static constexpr std::size_t value = 1;
476 };
477
478 const std::size_t Size;
479 };
480
481 public:
453 static void initRegisterSet( 482 static void initRegisterSet(
454 std::array<llvm::SmallBitVector, RCX86_NUM> *TypeToRegisterSet, 483 std::array<llvm::SmallBitVector, RCX86_NUM> *TypeToRegisterSet,
455 std::array<llvm::SmallBitVector, RegisterSet::Reg_NUM> *RegisterAliases, 484 std::array<llvm::SmallBitVector, RegisterSet::Reg_NUM> *RegisterAliases,
456 llvm::SmallBitVector *ScratchRegs) { 485 llvm::SmallBitVector *ScratchRegs) {
457 llvm::SmallBitVector IntegerRegistersI64(RegisterSet::Reg_NUM); 486 llvm::SmallBitVector IntegerRegistersI64(RegisterSet::Reg_NUM);
458 llvm::SmallBitVector IntegerRegistersI32(RegisterSet::Reg_NUM); 487 llvm::SmallBitVector IntegerRegistersI32(RegisterSet::Reg_NUM);
459 llvm::SmallBitVector IntegerRegistersI16(RegisterSet::Reg_NUM); 488 llvm::SmallBitVector IntegerRegistersI16(RegisterSet::Reg_NUM);
460 llvm::SmallBitVector IntegerRegistersI8(RegisterSet::Reg_NUM); 489 llvm::SmallBitVector IntegerRegistersI8(RegisterSet::Reg_NUM);
461 llvm::SmallBitVector FloatRegisters(RegisterSet::Reg_NUM); 490 llvm::SmallBitVector FloatRegisters(RegisterSet::Reg_NUM);
462 llvm::SmallBitVector VectorRegisters(RegisterSet::Reg_NUM); 491 llvm::SmallBitVector VectorRegisters(RegisterSet::Reg_NUM);
463 llvm::SmallBitVector Trunc64To8Registers(RegisterSet::Reg_NUM); 492 llvm::SmallBitVector Trunc64To8Registers(RegisterSet::Reg_NUM);
464 llvm::SmallBitVector Trunc32To8Registers(RegisterSet::Reg_NUM); 493 llvm::SmallBitVector Trunc32To8Registers(RegisterSet::Reg_NUM);
465 llvm::SmallBitVector Trunc16To8Registers(RegisterSet::Reg_NUM); 494 llvm::SmallBitVector Trunc16To8Registers(RegisterSet::Reg_NUM);
466 llvm::SmallBitVector Trunc8RcvrRegisters(RegisterSet::Reg_NUM); 495 llvm::SmallBitVector Trunc8RcvrRegisters(RegisterSet::Reg_NUM);
467 llvm::SmallBitVector AhRcvrRegisters(RegisterSet::Reg_NUM); 496 llvm::SmallBitVector AhRcvrRegisters(RegisterSet::Reg_NUM);
468 llvm::SmallBitVector InvalidRegisters(RegisterSet::Reg_NUM); 497 llvm::SmallBitVector InvalidRegisters(RegisterSet::Reg_NUM);
469 ScratchRegs->resize(RegisterSet::Reg_NUM); 498 ScratchRegs->resize(RegisterSet::Reg_NUM);
470 499
500 static constexpr struct {
501 uint16_t Val;
502 int Is64 : 1;
503 int Is32 : 1;
504 int Is16 : 1;
505 int Is8 : 1;
506 int IsXmm : 1;
507 int Is64To8 : 1;
508 int Is32To8 : 1;
509 int Is16To8 : 1;
510 int IsTrunc8Rcvr : 1;
511 int IsAhRcvr : 1;
512 int Scratch : 1;
513 #define NUM_ALIASES_BITS 2
514 SizeT NumAliases : (NUM_ALIASES_BITS + 1);
515 uint16_t Aliases[1 << NUM_ALIASES_BITS];
516 #undef NUM_ALIASES_BITS
517 } X8664RegTable[RegisterSet::Reg_NUM] = {
471 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \ 518 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
472 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \ 519 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
473 isTrunc8Rcvr, isAhRcvr, aliases) \ 520 isTrunc8Rcvr, isAhRcvr, aliases) \
474 (IntegerRegistersI64)[RegisterSet::val] = is64; \ 521 { \
475 (IntegerRegistersI32)[RegisterSet::val] = is32; \ 522 RegisterSet::val, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
476 (IntegerRegistersI16)[RegisterSet::val] = is16; \ 523 isTrunc8Rcvr, isAhRcvr, scratch, (SizeOf aliases).size(), aliases, \
477 (IntegerRegistersI8)[RegisterSet::val] = is8; \
478 (FloatRegisters)[RegisterSet::val] = isXmm; \
479 (VectorRegisters)[RegisterSet::val] = isXmm; \
480 (Trunc64To8Registers)[RegisterSet::val] = is64To8; \
481 (Trunc32To8Registers)[RegisterSet::val] = is32To8; \
482 (Trunc16To8Registers)[RegisterSet::val] = is16To8; \
483 (Trunc8RcvrRegisters)[RegisterSet::val] = isTrunc8Rcvr; \
484 (AhRcvrRegisters)[RegisterSet::val] = isAhRcvr; \
485 (*RegisterAliases)[RegisterSet::val].resize(RegisterSet::Reg_NUM); \
486 for (SizeT RegAlias : aliases) { \
487 assert(!(*RegisterAliases)[RegisterSet::val][RegAlias] && \
488 "Duplicate alias for " #val); \
489 (*RegisterAliases)[RegisterSet::val].set(RegAlias); \
490 } \ 524 } \
491 (*RegisterAliases)[RegisterSet::val].set(RegisterSet::val); \ 525 ,
492 (*ScratchRegs)[RegisterSet::val] = scratch; 526 REGX8664_TABLE
493 REGX8664_TABLE;
494 #undef X 527 #undef X
528 };
529
530 for (SizeT ii = 0; ii < llvm::array_lengthof(X8664RegTable); ++ii) {
531 const auto &Entry = X8664RegTable[ii];
532 (IntegerRegistersI64)[Entry.Val] = Entry.Is64;
533 (IntegerRegistersI32)[Entry.Val] = Entry.Is32;
534 (IntegerRegistersI16)[Entry.Val] = Entry.Is16;
535 (IntegerRegistersI8)[Entry.Val] = Entry.Is8;
536 (FloatRegisters)[Entry.Val] = Entry.IsXmm;
537 (VectorRegisters)[Entry.Val] = Entry.IsXmm;
538 (Trunc64To8Registers)[Entry.Val] = Entry.Is64To8;
539 (Trunc32To8Registers)[Entry.Val] = Entry.Is32To8;
540 (Trunc16To8Registers)[Entry.Val] = Entry.Is16To8;
541 (Trunc8RcvrRegisters)[Entry.Val] = Entry.IsTrunc8Rcvr;
542 (AhRcvrRegisters)[Entry.Val] = Entry.IsAhRcvr;
543 (*RegisterAliases)[Entry.Val].resize(RegisterSet::Reg_NUM);
544 for (int J = 0; J < Entry.NumAliases; ++J) {
545 SizeT Alias = Entry.Aliases[J];
546 assert(!(*RegisterAliases)[Entry.Val][Alias] && "Duplicate alias");
547 (*RegisterAliases)[Entry.Val].set(Alias);
548 }
549 (*RegisterAliases)[Entry.Val].set(Entry.Val);
550 (*ScratchRegs)[Entry.Val] = Entry.Scratch;
551 }
495 552
496 (*TypeToRegisterSet)[RC_void] = InvalidRegisters; 553 (*TypeToRegisterSet)[RC_void] = InvalidRegisters;
497 (*TypeToRegisterSet)[RC_i1] = IntegerRegistersI8; 554 (*TypeToRegisterSet)[RC_i1] = IntegerRegistersI8;
498 (*TypeToRegisterSet)[RC_i8] = IntegerRegistersI8; 555 (*TypeToRegisterSet)[RC_i8] = IntegerRegistersI8;
499 (*TypeToRegisterSet)[RC_i16] = IntegerRegistersI16; 556 (*TypeToRegisterSet)[RC_i16] = IntegerRegistersI16;
500 (*TypeToRegisterSet)[RC_i32] = IntegerRegistersI32; 557 (*TypeToRegisterSet)[RC_i32] = IntegerRegistersI32;
501 (*TypeToRegisterSet)[RC_i64] = IntegerRegistersI64; 558 (*TypeToRegisterSet)[RC_i64] = IntegerRegistersI64;
502 (*TypeToRegisterSet)[RC_f32] = FloatRegisters; 559 (*TypeToRegisterSet)[RC_f32] = FloatRegisters;
503 (*TypeToRegisterSet)[RC_f64] = FloatRegisters; 560 (*TypeToRegisterSet)[RC_f64] = FloatRegisters;
504 (*TypeToRegisterSet)[RC_v4i1] = VectorRegisters; 561 (*TypeToRegisterSet)[RC_v4i1] = VectorRegisters;
(...skipping 412 matching lines...) Expand 10 before | Expand all | Expand 10 after
917 974
918 } // end of namespace X86Internal 975 } // end of namespace X86Internal
919 976
920 namespace X8664 { 977 namespace X8664 {
921 using Traits = ::Ice::X86Internal::MachineTraits<TargetX8664>; 978 using Traits = ::Ice::X86Internal::MachineTraits<TargetX8664>;
922 } // end of namespace X8664 979 } // end of namespace X8664
923 980
924 } // end of namespace Ice 981 } // end of namespace Ice
925 982
926 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8664TRAITS_H 983 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8664TRAITS_H
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