Subzero. X86. Refactors initRegisterSet.

src/IceInstX8632.def

 //===- subzero/src/IceInstX8632.def - X-macros for x86-32 insts -*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file defines properties of lowered x86-32 instructions in the
@@ skipping 104 matching lines @@
 
 // Note: It would be more appropriate to list the xmm register aliases as
 // REGLIST0(), but the corresponding empty initializer gives a syntax error, so
 // we use REGLIST1() to redundantly assign the register itself as an alias.
 #define REGX8632_XMM_TABLE                                                     \
   /* val, encode, name, base, scratch,preserved,stackptr,frameptr,             \
      isGPR,is64,is32,is16,is8, isXmm,                                          \
      is64To8,is32To8,is16To8,isTrunc8Rcvr,isAhRcvr, aliases */                 \
   /* xmm registers */                                                          \
   X(Reg_xmm0, 0, "xmm0", Reg_xmm0, 1,0,0,0, 0,0,0,0,0, 1, 0,0,0,0,0,           \
-    REGLIST1(RegX8632, xmm0))                                                  \
+    NO_ALIASES())                                                              \
   X(Reg_xmm1, 1, "xmm1", Reg_xmm1, 1,0,0,0, 0,0,0,0,0, 1, 0,0,0,0,0,           \
-    REGLIST1(RegX8632, xmm1))                                                  \
+    NO_ALIASES())                                                              \
   X(Reg_xmm2, 2, "xmm2", Reg_xmm2, 1,0,0,0, 0,0,0,0,0, 1, 0,0,0,0,0,           \
-    REGLIST1(RegX8632, xmm2))                                                  \
+    NO_ALIASES())                                                              \
   X(Reg_xmm3, 3, "xmm3", Reg_xmm3, 1,0,0,0, 0,0,0,0,0, 1, 0,0,0,0,0,           \
-    REGLIST1(RegX8632, xmm3))                                                  \
+    NO_ALIASES())                                                              \
   X(Reg_xmm4, 4, "xmm4", Reg_xmm4, 1,0,0,0, 0,0,0,0,0, 1, 0,0,0,0,0,           \
-    REGLIST1(RegX8632, xmm4))                                                  \
+    NO_ALIASES())                                                              \
   X(Reg_xmm5, 5, "xmm5", Reg_xmm5, 1,0,0,0, 0,0,0,0,0, 1, 0,0,0,0,0,           \
-    REGLIST1(RegX8632, xmm5))                                                  \
+    NO_ALIASES())                                                              \
   X(Reg_xmm6, 6, "xmm6", Reg_xmm6, 1,0,0,0, 0,0,0,0,0, 1, 0,0,0,0,0,           \
-    REGLIST1(RegX8632, xmm6))                                                  \
+    NO_ALIASES())                                                              \
   X(Reg_xmm7, 7, "xmm7", Reg_xmm7, 1,0,0,0, 0,0,0,0,0, 1, 0,0,0,0,0,           \
-    REGLIST1(RegX8632, xmm7))                                                  \
+    NO_ALIASES())                                                              \
   /* End of xmm register set */
 //#define X(val, encode, name, base, scratch, preserved, stackptr, frameptr,
 //          isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8,
 //          isTrunc8Rcvr, isAhRcvr, aliases)
 
 // We also provide a combined table, so that there is a namespace where
 // all of the registers are considered and have distinct numberings.
 // This is in contrast to the above, where the "encode" is based on how
 // the register numbers will be encoded in binaries and values can overlap.
 #define REGX8632_TABLE                                                         \
@@ skipping 74 matching lines @@
   X(v4i1,  i32,          "?",  "",   "",   "",   "d",  "",    "")              \
   X(v8i1,  i16,          "?",  "",   "",   "",   "w",  "",    "")              \
   X(v16i1, i8,           "?",  "",   "",   "",   "b",  "",    "")              \
   X(v16i8, i8,           "?",  "",   "",   "",   "b",  "",    "")              \
   X(v8i16, i16,          "?",  "",   "",   "",   "w",  "",    "")              \
   X(v4i32, i32,          "dq", "",   "",   "",   "d",  "",    "")              \
   X(v4f32, f32,          "ps", "",   "ps", "ps", "d",  "",    "")
 //#define X(tag, elementty, cvt, sdss, pdps, spsd, pack, width, fld)
 
 #endif // SUBZERO_SRC_ICEINSTX8632_DEF